• 제목/요약/키워드: Ripple voltage

검색결과 738건 처리시간 0.023초

단위 역률을 갖는 3상 BUCK 다이오드 정류기에서의 새로운 DC 리플-전압 저감 기법 (A New DC Ripple-Voltage Suppression Scheme in Three Phase Buck Diode Rectifiers with Unity Power Factor)

  • 이동윤;최익;송중호;최주엽;김광배;현동석
    • 전력전자학회논문지
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    • 제5권2호
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    • pp.154-162
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    • 2000
  • 본 논문에서는 3상 강압형 다이오드 정류기에서 출력전압의 저주파 리플 전압을 감소시키기 위한 새로운 제어기법을 제안한다. 제안한 펄스 주파수 변조 기법은 강압형 다이오드 정류기의 출력전압과 넓은 부하 범위에 대한 주 스위치의 영전류 스위칭을 보장하기 위해 적용된다. 본 논문에서 적용된 펄스 주파수 변조 기법은 일반적으로 입력전류의 낮은 고조파의 단위 역률의 장점을 지니고 있다. 또한 출력전압에서 보여진 저주파 리플전압을 감소시키기 위해 효과적으로 사용되어진다. 제안된 제어기법을 자세하게 설명하며 그 타당성을 검증하기 위해 시뮬레인션 및 실험을 통하여 검증한다.

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단상 3-레벨 PWM 컨버터를 위한 중성점 전압 변동 보상 기법 (DC-link Voltage Ripple Compensation Method for Single Phase 3-level PWM Converters)

  • 이희면;이동명
    • 조명전기설비학회논문지
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    • 제27권4호
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    • pp.8-15
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    • 2013
  • This paper proposes a DC-link voltage variation compensation method for a 3-level single phase converter for high-speed trains. Since 3-level NPC(Neutral Point Clamped) type converters have the split DC-link causing the inherent problem of voltage fluctuations in the upper and lower capacitors, reducing the voltage difference between the top and bottom capacitors is required. In this paper, compensation time proportional to the voltage difference is added to PWM switching time to solve the voltage variation. The compensation time is obtained by a PI controller. Simulation results demonstrate the validity of the proposed method.

고전압 대용량을 위한 새로운 인버터 토폴로지 (A New Inverter Topology for High Voltage and High Power Applications)

  • 김태훈;최세완;박기원;이왕하
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제52권2호
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    • pp.80-86
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    • 2003
  • In this paper, a new three-phase voltage-source inverter topology for high voltage and high Power applications is proposed to improve the quality of output voltage waveform. A chain converter which is used as an auxiliary circuit generates a ripple voltage and injects it to the conventional 12-step inverter. Thus, the injection of the ripple voltage results in 36-step operation with a link and 60-step operation with two links. The proposed inverter is compared to the conventional multilevel inverter in the viewpoint of ratings of phase- shifting transformers, switching devices and capacitors employed. The proposed scheme is simple to control capacitor voltages compared to the conventional schems and is cost effective for high voltage and high power application over several tens of MVA. The proposed approach is validated through simulation, and the experimental results are provided from a 2KVA laboratory prototype.

A Novel Push-Pull Type Charge Pump Based on Voltage Doubler for LCD Drivers

  • Choi, Sung-Wook;Kwack, Kae-Dal
    • Journal of Information Display
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    • 제9권2호
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    • pp.9-13
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    • 2008
  • A novel push-pull voltage converter structure, using a switched capacitor type voltage doubler, is proposed. The circuit is constructed with a two-stage push-pull voltage doubler that has a stable operation with small output ripple. The two-stage voltage doubler creates the output voltage 4Vdd. The high clock signal is cross-coupled to the input of the second stage with the opposite phase to reduce two switching transistors and capacitors. Simulation results verify that even with a reduced number of transistor and capacitor, there is no circuit performance loss. Adding one capacitor and two switching transistors the circuit can be changed to eight times of Vdd maker.

4스위치 3상 인버터의 직류 링크 중성점 전압 추정에 의한 출력전압 불평형 개선 (Improvement of Output Voltage Waveforms by DC-Link Neutral Point Voltage Estimation for FSTPI)

  • 김정훈;조인철;이홍희
    • 전기학회논문지
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    • 제58권9호
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    • pp.1741-1749
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    • 2009
  • It is very important to maintain the balanced output voltage waveforms under the unbalanced DC-link voltages in the four-switch three-phase inverter(FSTPI). In this paper, the improvement of output voltage waveforms is proposed with the aid of DC-link voltage ripple estimation. The proposed method can be implemented without the additional voltage sensor. The proposed method applied to the permanent magnet synchronous motor (PMSM) is simulated and experimented in order to verify its feasibility.

듀얼 인버터 개방 권선형 영구자석 동기 전동기 제어를 위한 PWM 가변 캐리어 생성법 및 영벡터 위치에 따른 전류 리플 분석 (PWM Variable Carrier Generating Method for OEW PMSM with Dual Inverter and Current Ripple Analysis according to Zero Vector Position)

  • 심재훈;최현규;하정익
    • 전력전자학회논문지
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    • 제25권4호
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    • pp.279-285
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    • 2020
  • An open-end winding (OEW) permanent magnet synchronous motor with dual inverters can synthesize large voltages for a motor with the same DC link voltage. This ability has the advantage of reducing the use of DC/DC boost converters or high voltage batteries. However, zero-sequence voltage (ZSV), which is caused by the difference in the combined voltage between the primary and secondary inverters, can generate a zero-sequence current (ZSC) that increases system losses. Among the methods for eliminating this phenomenon, combining voltage vector eliminated ZSV cannot be accomplished by the conventional Pulse Width Modulation(PWM) method. In this study, a PWM carrier generation method using functionalization to generate a switching pattern to suppress ZSC is proposed and applied to analyze the control influence of the center-zero vector in the switching sequence about the current ripple.

단상하프브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계 (Filter Design for Utility Interactive Inverters using Single-Phase Half-Bridge Topology)

  • 김효성
    • 전력전자학회논문지
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    • 제12권5호
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    • pp.364-371
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    • 2007
  • 본 논문은 단상하프브릿지 구조를 갖는 계통연계형 전압형 PWM 인버터를 위한 필터설계를 목적으로 한다. 단상하프브릿지 전압형 PWM 인버터의 교류출력단 전압과 계통전압의 관계를 분석하여 필터 인덕터에 순시적으로 인가되는 전압의 특징적인 관계를 정성적 및 정량적으로 파악하였다. 또한 교류출력단 전압의 분석을 기초로 하여 필터인덕터에 흐르는 스위칭리플전류의 크기를 정량적으로 구하였다. 이러한 분석을 기초로 하여 계통주입전류의 기본파성분에 대한 스위칭리플전류의 비율을 평가함수로 하는 필터인덕터의 설계법을 제시하였다. 제안된 설계방법을 시뮬레이션 및 실험을 통하여 검증한다.

High Performance Charge Pump Converter with Integrated CMOS Feedback Circuit

  • Jeong, Hye-Im;Park, Jung-Woong;Choi, Ho-Yong;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제15권3호
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    • pp.139-143
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    • 2014
  • In this paper, an integrated low-voltage control circuit is introduced for a charge pump DC-DC boost converter. By exploiting the advantage of the integration of the feedback control circuit within CMOS technology, the charge pump boost converter offers a low-current operation with small ripple voltage. The error amplifier, comparator, and oscillator in the control circuit are designed with the supply voltage of 3.3 V and the operating frequency of 1.6~5.5 MHz. The charge pump converter with the 4 or 8 pump stages is measured in simulation. The test in the $0.35{\mu}m$ CMOS process shows that the load current and ripple ratio are controlled under 1 mA and 2% respectively. The output-voltage is obtained from 4.8 ~ 8.5 V with the supply voltage of 3.3 V.

On DC-Side Impedance Frequency Characteristics Analysis and DC Voltage Ripple Prediction under Unbalanced Conditions for MMC-HVDC System Based on Maximum Modulation Index

  • Liu, Yiqi;Chen, Qichao;Li, Ningning;Xie, Bing;Wang, Jianze;Ji, Yanchao
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.319-328
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    • 2016
  • In this study, we first briefly introduce the effect of circulating current control on the modulation signal of a modular multilevel converter (MMC). The maximum modulation index is also theoretically derived. According to the optimal modulation index analysis and the model in the continuous domain, different DC-side output impedance equivalent models of MMC with/without compensating component are derived. The DC-side impedance of MMC inverter station can be regarded as a series xR + yL + zC branch in both cases. The compensating component of the maximum modulation index is also related to the DC equivalent impedance with circulating current control. The frequency characteristic of impedance for MMC, which is observed from its DC side, is analyzed. Finally, this study investigates the prediction of the DC voltage ripple transfer between two-terminal MMC high-voltage direct current systems under unbalanced conditions. The rationality and accuracy of the impedance model are verified through MATLAB/Simulink simulations and experimental results.

단상풀브릿지 구조를 갖는 계통연계형 인버터의 필터인덕터 설계 (Filter Design for Utility Interactive Inverters using Single-phase Full-bridge Topology)

  • 김효성
    • 전력전자학회논문지
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    • 제12권4호
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    • pp.346-353
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    • 2007
  • 본 논문은 단상풀브릿지 구조를 갖는 계통연계형 전압형 PWM 인버터를 위한 필터설계를 목적으로 한다. 단상풀브릿지 전압형 PWM 인버터의 교류출력단 전압과 계통전압의 관계를 분석하여 필터인덕터에 순시적으로 인가되는 전압의 특징적인 관계를 정성적 및 정량적으로 파악하였다. 교류출력단 전압의 분석을 기초로 하여 필터인덕터에 흐르는 스위칭리플전류의 크기를 정량적으로 구하였다. 이러한 분석을 기초로 하여 계통주입전류의 기본파성분에 대한 리플전류의 비율을 평가함수로 하는 필터인덕터의 설계법을 제시하였다. 제안된 설계방법을 시뮬레이션 및 실험을 통하여 검증하였다.