• Journal of Sensor Science and Technology
• /
• v.26 no.6
• /
• pp.438-444
• /
• 2017

In this paper, we focus on optimization of the in-situ phosphorous (P) doping of low-pressure chemical vapor deposited (LPCVD) poly Si resistors for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $600^{\circ}C$. The deposited poly Si films were annealed by rapid thermal anneal (RTA) process at the temperature range from 900 to $1000^{\circ}C$ for 90s in nitrogen ambient to relieve intrinsic stress and decrease the TCR in the poly Si layer and get the Ohmic contact. After the RTA process, a roughness of the thin film was slightly changed but the grain size and crystallinity of the thin film with the increase in anneal temperature. The film annealed at $1,000^{\circ}C$ showed the behavior of Schottky contact and had dislocations in the films. Ohmic contact and TCR of $334.4{\pm}8.2$ (ppm/K) within 4 inch wafer were obtained in the measuring temperature range of 25 to $600^{\circ}C$ for the optimized 200 nm thick-poly Si film with width/length of $20{\mu}m/1,800{\mu}m$. This shows the potential of in-situ P doped LPCVD poly Si as a resistor for pressure sensor in harsh environment applications.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2000.11a
• /
• pp.61-64
• /
• 2000

We fabricated and characterized Low Noise Amplifier (LNA) using MCM-C (Multi-Chip-Module-Cofired) technology for 2.14 GHz IMT-2000 mobile terminal application. First, We designed LNA circuits and simulated it's high frequency characteristics using circuits simulator. For the simulation, we adopted high frequency libraries of all the devices used in LNA samples. By the simulation, Gain was 17 dB and Noise Figure was 1.4 dB. We used multilayer process of LTCC (Low Temperature Co-fired Ceramics) substrate and conductor, resistor pattern for the MCM-C LNA fabrication. We made 2 buried inductors, 2 buried capacitors and 3 buried resistors. The number of the total layers was 6. On the top layer, we patterned microstrip line and pads for the SMT device. We measured the high frequency characteristics, and the results were 14.7 dB Gain and 1.5 dB Noise Figure.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.12
• /
• pp.22-28
• /
• 2008

This paper designed a efficient 8-bit CMOS analog-to-digital converter(ADC) for an SOC(System On Chip) application. The architecture consists of two modified 4-bit full-flash ADCs, it has been designed using a more efficient architecture. This is to predict roughly the range in which input signal residers and can be placed in the proximity of input signal based on initial prediction. The prediction of input signal is made available by introducing a voltage estimator. For 4-bit resolution, the modified full-flash ADC need only 6 comparators. So a 8-bit ADC require only 12 comparators and 32 resistors. The speed of this ADC is almost similar to conventional full-flash ADC, but the die area consumption is much less due to reduce numbers of comparators and registors. This architecture uses even fewer comparator than half-flash ADC. The circuits which are implemented in this paper is simulated with LT SPICE tool of computer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.26 no.7
• /
• pp.597-605
• /
• 2015

Negative impedance converter(NIC)-based non-Foster impedance matching is proposed for an electrically small antenna. The antenna considered in this work is a resistively loaded vee dipole(RVD) antenna, which has considerable reflection at the feed point because of its large negative input reactance. The non-Foster matching circuit built near the feed point consists of two-stage NIC circuit and a capacitor connected between the stages. The NIC is realized by using operational amplifiers(op-amps) and resistors. The circuit is designed by considering of the input impedance according to the finite open-loop gain of the practical NICs. The stability test of the impedance-matched RVD antenna is performed. The non- Foster matching circuit is implemented with the RVD antenna. The measured impedance demonstrates that the proposed non-Foster matching circuit effectively reduces the input reactance of the RVD antenna.

• Proceedings of the KIEE Conference
• /
• 2015.07a
• /
• pp.433-434
• /
• 2015

Dictionary meaning of circuit-breaker is a mechanical switching device, capable of making, carrying and breaking currents under normal circuit conditions and also making, carrying for a specified time and breaking currents under specified abnormal circuit conditions such as those of short circuit. and it had been recognized as being operated simultaneously. Controlled Switching System(CSS), which is technology for individual pole operation, are widely used to reduce transient phenomenon, for example switching surges, inrush current, for a all switching cases and nowadays it have become and economical solution for a switching place. The conventional solution to these problem is the use of pre-insertion resistors of $520{\Omega}$. However, it is recognised that the cost for products and maintenance are expensive and this apparatus makes more complex the circuit-breaker mechanism. Korea Electric Power Cooperation (KEPCO) has been study for relevant CCS technology since pilot application in substation in 2003 and plan to apply the actual power grid in 2017. This paper deals with the investigation of international CCS operation status and preview for application in KEPCO power grid.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.05a
• /
• pp.349-351
• /
• 2013

This research paper presents a low-power programmable gain amplifier (PGA) to facilitate signal processing of the detection of defects in steel plates. This circuit is able to adjust a gain in the range of 6 to 60dB in 7 steps using different signal types for various defects from hall sensors. The gain of PGA is designed by operating on-resistors of switches and passive components. The proposed PGA ($0.18{\mu}m$ CMOS process with 1.8 supply voltage) showed excellent gain error of less than -0.2dB, and low power consumption of 0.47mW.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.15 no.3
• /
• pp.1700-1706
• /
• 2014

In this paper, a step down converter for LED backlight of mobile application has been proposed. The converter which is operated with 4 MHz high switching frequency is capable of reducing mounting area of passive devices consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. The control block consists of pulse width modulator, error amplifier and oscillator etc. Proposed step down converter has been designed and verified using a $0.35{\mu}m$ 1-poly 4-metal BCD process technology. Simulation results show that the output voltage is 1.8 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 KHz driven converter when the duty ratio is 0.4.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.18 no.6
• /
• pp.554-559
• /
• 2005

Ni/Cr thin film is very interesting material as thin film resistors, filaments, and humidity sensors because their relatively large resistivity, more resistant to oxidation and a low temperature coefficient of resistance (TCR). These interesting properties of Ni/Cr thin films are dependent upon the preparation conditions including the deposition environment and subsequent annealing treatments. Ni/Cr thin films of 250 nm were deposited by DC magnetron sputtering on $Al_2O_3/Si$ substrate with 2-inch Ni/Cr (80/20) alloy target at room temperature for 45 minutes. Annealing treatments were performed at $400^{\circ}C,\;500^{\circ}C,\;and\;600^{\circ}C$ for 6 hours in air or $H_2$ ambient, respectively. The clear crystal boundaries without crystal growth and the densification were accomplished when the pores were disappeared in air ambient. Most of surface was oxidic including NiO, $Ni_2O_3$ and $Cr_xO_y$(x=1,2, y=2,3) after annealing in air ambient. The crystal growth in $H_2$ ambient was formed and stabilized by combination with each other due to the suppression of oxidized substance on film surface. Most oxidic Ni was restored when the oxidic Cr was present due to its stability in high-temperature $H_2$ ambient.

• Journal of the Institute of Convergence Signal Processing
• /
• v.13 no.1
• /
• pp.44-49
• /
• 2012

The indirect-contact ECG measurement is a newly developed method for unconstrained and nonconscious measurement in daily Life. This study is the first step to reducing the large background noise appearing in indirect-contact ECG. This study built the thermal noise model of capacitively coupled active electrode which is used in indirect-contact ECG. The results show that the level of thermal noise estimated by the thermal noise model is much the same as that of actual background noise for the capacitively coupled active electrode alone. By applying the actual electrical properties of a sample cotton cloth to the thermal noise model, the theoretical level of thermal noise in the indirect-contact ECG was estimated. The results also show that the level of op-amp's intrinsic noise is so small that it can be negligible in comparison with thermal noise of resistors. The relationship between the level of thermal noise and the resistance of the bias resistor was derived, and it is the base for the further study how to choice the optimal resistance for the bias resistor.

• Progress in Superconductivity
• /
• v.3 no.2
• /
• pp.241-246
• /
• 2002

We have performed the current and voltage loading tests of resistive superconducting fault current limiters (SFCLS) based on $YBa_2$$Cu_3$$O_{7}$(YBCO) films with the diameter of 2 inch. The SFCL consists of meander-type YBCO stripes covered with 200 nm Au layer grown in situ for current shunt and heat dispersion at hot spots. The minimum quench current of an SFCL unit was about 25 Apeak. Seven SFCL units were connected in parallel fur the current load ing tests at power source of 100 $V_{rms}$ $/2,000A_{rms}$. This SFCL units had maximum limiting current of 170 Apeak during the fault instant and then successfully controlled the fault current below 100 Apeak within 1~2 msec after short circuit. Increased short current also reduced the quench completion time with little change of current limiting characterization. We connected six SFCL units in series fur the voltage loading tests at power source of $1,200 V_{rms}$/170 $A_{rms}$ at this time. The shunt resistors were inserted into each SFCL unit to eliminate power imbalance originated from serial connection of SFCL units. Each SFCL unit was quenched simultaneously during the fault condition. The current increased up to 40 $A_{peak}$ and decreased to 14 $A_{peak}$ after 3 cycles. Quench was completed within 1 msec after the fault. We confirmed operating characteristics of 140 kVA($120 A_{rms}$ $\times$ 1,200 $V_{rms}$) SFCL and presented the manufacturing possibility of 3.3 kV SFCL using 4 inch YBCO films.BCO films.lms.