• 제목/요약/키워드: Resistance-capacitance

검색결과 459건 처리시간 0.023초

Equivalent-circuit Analysis of ITO/Alq3/Al Organic Light-emitting Diode

  • Chung, Dong-Hoe;Kim, Tae-Wan
    • Transactions on Electrical and Electronic Materials
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    • 제8권3호
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    • pp.131-134
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    • 2007
  • An $ITO/Alq_3/Al$ structure was used to study complex impedance of $Alq_3$ based organic light-emitting diodes. Equivalent circuit was analyzed in a device structure of $ITO/Alq_3/Al$ with a thickness layer of $Alq_3$ of 100 nm. The obtained impedance was able to be fitted using equivalent circuit model of parallel combination of resistance $R_p$ and capacitance $C_p$ with a small series resistance of $R_s$.

Quad Tree 구조를 이용한 회로 추출기 (A Circuit Extractor Using the Quad Tree Structure)

  • 이건배;정정화
    • 대한전자공학회논문지
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    • 제25권1호
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    • pp.101-107
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    • 1988
  • This paper proposes a circuit extractor which extracts a netlist from the CIF input file cntaining the layout mask artwork informations. The circuit extractor extracts transistors and their interconnections, and calculates circuit parameter such as parasitic resistance and parasitic capacitance from the mask informations. When calculating the parasitic resistance, we consider the current flow path to reduce the errors caused by the resistance approximation. Similarly, we consider the coupling capacitance which has an effect on the circuit characteristics, when the parasitic capacitances are calculated. Therefore, using these parameter values as an input to circuit simulation, the circuit characteristics such as delay time can be estimated accurately. The presented circuit extraction algorithm uses a multiple storage quad tree as a data sturucture for storing and searching the 2-dimensional geometric data of mask artwork. Also, the proposed algorithm is technologically independent to work across a wide range of MOS technologies without any change in the algorihm.

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Conducting and interface characterization of carbonate-type organic electrolytes containing EMImBF4 as an additive against activated carbon electrode

  • Kim, Mingyeong;Kim, Kyungmin;Kim, Seok
    • Carbon letters
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    • 제16권1호
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    • pp.51-56
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    • 2015
  • Carbonate-type organic electrolytes were prepared using propylene carbonate (PC) and dimethyl carbonate (DMC) as a solvent, quaternary ammonium salts, and by adding different contents of 1-ethyl-3-methyl imidazolium tetrafluoroborate ($EMImBF_4$). Cyclic voltammetry and linear sweep voltammetry were performed to analyze conducting behaviors. The surface characterizations were analyzed by scanning electron microscopy method and X-ray photoelectron spectroscopy. From the experimental results, increasing the $EMImBF_4$ content increased the ionic conductivity and reduced bulk resistance and interfacial resistance. In particular, after adding 15 vol% $EMImBF_4$ in 0.2 M $SBPBF_4$ PC/DMC electrolyte, the organic electrolyte showed superior capacitance and interfacial resistance. However, when $EMImBF_4$ content exceeded 15 vol%, the capacitance was saturated and the voltage range decreased.

비전도성 접착제로 국부적으로 둘러싸인 인터록킹 접속구조를 이용한 플립칩 공정 (A Flip Chip Process Using an Interlocking-Joint Structure Locally Surrounded by Non-conductive Adhesive)

  • 최정열;오태성
    • 대한금속재료학회지
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    • 제50권10호
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    • pp.785-792
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    • 2012
  • A new flip chip structure consisting of interlocking joints locally surrounded by non-conductive adhesive was investigated in order to improve the contact resistance characteristics and prevent the parasitic capacitance increase. The average contact resistance of the interlocking joints was substantially reduced from $135m{\Omega}$ to $79m{\Omega}$ by increasing the flip chip bonding pressure from 85 MPa to 185 MPa. Improvement of the contact resistance characteristics at higher bonding pressure was attributed not only to the increased contact area between Cu chip bumps and Sn pads, but also to the severe plastic deformation of Sn pads caused during formation of the interlocking-joint structure. The parasitic capacitance increase due to the non-conductive adhesive locally surrounding the flip chip joints was estimated to be as small as 12.5%.

저항 및 커패시턴스 스케일링 구조를 이용한 위상고정루프 (A Phase Locked Loop with Resistance and Capacitance Scaling Scheme)

  • 송윤귀;최영식;류지구
    • 대한전자공학회논문지SD
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    • 제46권4호
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    • pp.37-44
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    • 2009
  • 본 논문에서는 다중 전하펌프를 이용하여 저항과 커패시턴스 크기를 변화시키는 구조의 새로운 위상고정루프를 제안하였다. 제안된 위상고정루프는 세 개의 전하펌프를 사용하여 루프필터의 실효 커패시턴스와 저항을 위상고정 상태에 따라 각 전하펌프의 전류량 크기와 방향 제어를 통해 증감시킬 수 있다. 이러한 구조는 좁은 대역폭과 작은 루프 필터 저항 값을 가능하게 하여 좋은 잡음 특성과 기준 주파수 의사 잡음 특성을 가지도록 한다. 제안된 위상고정루프는 3.3V $0.35{\mu}m$ CMOS 공정을 이용하여 제작되었다. 851.2MHz 출력 주파수에서 측정된 위상 잡음은 -105.37 dBc/Hz @1MHz이며, 기준 주파수 의사 잡음은 -50dBc이다. 측정된 위상고정시간은 $25{\mu}s$이다.

전기이중층 커패시터용 질소성 작용기를 이용한 개질 활성탄의 전기화학적 특성 (Electrochemical Characteristics of Reforming Activated Carbon with Nitrogenous Functional Group for Electric Double Layer Capacitor)

  • 양정진;최영주;김한주;육영재;박수길
    • 전기화학회지
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    • 제16권2호
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    • pp.65-69
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    • 2013
  • 전기이중층 커패시터용 활성탄의 정전 용량 향상을 위해 우레아를 이용해 활성탄 표면에 펩티드 결합을 유도하였다. 우레아 도입에 따른 활성탄은 소성과정을 거쳐 안정화되었으며, 전기화학적 특성을 순환전류 전압법을 이용하여 정전 용량을 관찰하고, 임피던스를 통해 저항 변화를 관찰하였으며, 충방전 평가를 통해 싸이클 성능을 관찰하였다. 결과적으로 질소성 작용기의 도입으로 정전 용량은 기존 탄소재에 비해 약 22.9%의 향상을 이루었으며, 저항 감소 및 우수한 싸이클 성능을 나타냄을 확인하였다.

Supercapacitor용 Polyaniline-Carbon Composite전극의 충방전 특성 (Charge-Discharge Properties of Polyaniline-Carbon Composite Electrodes for Supercapacitor)

  • 강광우;김종욱;구할본
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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    • pp.124-127
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    • 2000
  • The purpose of this study is to research and develop PAn-Carbon composite electrode for Supercapacitor. Supercapacitor cell of PAn-Carbon composite electrode with 1M $LiClO_{4}/IPC$ brings out good capacitor performance below 4.0V. The radius of semicircle of PAn-Carbon composite electrode adding 30wt% Acetylene Black was absolutely small. The total resistance of Supercapacitor cell mainly depended on internal resistance of he electrode. The discharge capacitance of PAn-Carbon on composite with 30wt% Acetylene Black in 1st and 50th cycles was 29 and 31F/g at current density of $1mA/cm^2$. The capacitance of PAn-Carbon composite with 30wt% Acetylene Black capacitor was larger than that of PAn capacitor without Acetylene Black. The coulombic efficiency of supercapacitor at discharge process of 1 and 50 cycles were 94 and 100%. respectively. PAn-Carbon composite Supercapacitor with 30wt.% Acetylene Black content showed good capacitance and stability with cycling.

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터널링 전계효과 트랜지스터의 고주파 파라미터 추출과 분석 (Analyses for RF parameters of Tunneling FETs)

  • 강인만
    • 대한전자공학회논문지SD
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    • 제49권4호
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    • pp.1-6
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    • 2012
  • 본 논문에서는 고주파에서 동작하는 터널링 전계효과 트랜지스터 (TFET)의 소신호 파라미터 추출과 이에 대한 분석을 다루고 있다. 시뮬레이션으로 구현된 TFET의 채널 길이는 50 nm에서 100 nm 사이에서 변화되었다. Conventional planar MOSFET 기반의 quasi-static 모델을 이용하여 TFET의 파라미터 추출이 이루어졌으며 다른 채널 길이를 갖는 TFET에 대한 소신호 파라미터의 값을 게이트 바이어스 변화에 따라서 추출하였다. 추출 결과로부터 effective gate resistance와 transconductance, source-drain conductance, gate capacitance 등 주요 파라미터의 채널 길이 변화에 따른 경향성이 conventional MOSFET과 상당히 다른 것을 확인하였다. 그리고 $f_T$는 MOSFET과 달리 게이트 길이 역수의 값에 정확히 반비례하는 특성을 보였으며 TFET의 고주파 특성 향상을 transconductance의 개선이 아닌 gate capacitance의 감소에 의하여 가능함을 알 수 있었다.

Simulation of 4H-SiC MESFET for High Power and High Frequency Response

  • Chattopadhyay, S.N.;Pandey, P.;Overton, C.B.;Krishnamoorthy, S.;Leong, S.K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권3호
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    • pp.251-263
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    • 2008
  • In this paper, we report an analytical modeling and 2-D Synopsys Sentaurus TCAD simulation of ion implanted silicon carbide MESFETs. The model has been developed to obtain the threshold voltage, drain-source current, intrinsic parameters such as, gate capacitance, drain-source resistance and transconductance considering different fabrication parameters such as ion dose, ion energy, ion range and annealing effect parameters. The model is useful in determining the ion implantation fabrication parameters from the optimization of the active implanted channel thickness for different ion doses resulting in the desired pinch off voltage needed for high drain current and high breakdown voltage. The drain current of approximately 10 A obtained from the analytical model agrees well with that of the Synopsys Sentaurus TCAD simulation and the breakdown voltage approximately 85 V obtained from the TCAD simulation agrees well with published experimental results. The gate-to-source capacitance and gate-to-drain capacitance, drain-source resistance and trans-conductance were studied to understand the device frequency response. Cut off and maximum frequencies of approximately 10 GHz and 29 GHz respectively were obtained from Sentaurus TCAD and verified by the Smith's chart.

Decrease of Parasitic Capacitance for Improvement of RF Performance of Multi-finger MOSFETs in 90-nm CMOS Technology

  • Jang, Seong-Yong;Kwon, Sung-Kyu;Shin, Jong-Kwan;Yu, Jae-Nam;Oh, Sun-Ho;Jeong, Jin-Woong;Song, Hyeong-Sub;Kim, Choul-Young;Lee, Ga-Won;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권2호
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    • pp.312-317
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    • 2015
  • In this paper, the RF characteristics of multi-finger MOSFETs were improved by decreasing the parasitic capacitance in spite of increased gate resistance in a 90-nm CMOS technology. Two types of device structures were designed to compare the parasitic capacitance in the gate-to-source ($C_{gs}$) and gate-to-drain ($C_{gd}$) configurations. The radio frequency (RF) performance of multi-finger MOSFETs, such as cut-off frequency ($f_T$) and maximum-oscillation frequency ($f_{max}$) improved by approximately 10% by reducing the parasitic capacitance about 8.2% while maintaining the DC performance.