• Title/Summary/Keyword: Resistance-capacitance

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Defects and Electrical Properties of NiO and Co3O4-doped ZnO-Bi2O3-Sb2O3 Ceramics (NiO와 Co3O4를 첨가한 ZnO-Bi2O3-b2O3 세라믹스의 결함과 전기적 특성)

  • Hong, Youn-Woo;Lee, Young-Jin;Kim, Sei-Ki;Kim, Jin-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.1
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    • pp.38-43
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    • 2013
  • In this study we aims to examine the effects of $Co_3O_4$ and NiO doping on the defects and electrical properties in ZnO-$Bi_2O_3-Sb_2O_3$ (Sb/Bi=0.5) varistors. It seemed to form ${Zn_i}^{{\cdot}{\cdot}}$(0.20 eV) and ${V_o}^{\cdot}$(0.33 eV) as dominant defects in Co and Ni co-doped ZBS system, however only ${V_o}^{\cdot}$ appeared in Co- or Ni-doped ZBS. Even though the same defects it was different in capacitance (1.5~4.5 nF) and resistance ($0.3{\sim}9.5k{\Omega}$). The varistor characteristics were improved with Co and Co+Ni doping (non-linear coefficient, ${\alpha}$= 36 and 29, relatively) in ZBS. The various parameters ($N_d=1.43{\sim}2.33{\times}10^{17}cm^{-3}$, $N_t=1.40{\sim}2.28{\times}10^{12}cm^{-2}$, ${\Phi}b$=1.76~2.37 V, W= 98~118 nm) calculated from the C-V characteristics in our systems did not depend greatly on the type of dopant, which were in the range of a typical ZnO varistors. It should be derived a improved C-V equation carefully for more reliable parameters because the variation of the varistor capacitance as a function of the applied dc voltage is depend on the defect, frequency, and temperature.

Improvement of Energy Density in Supercapacitor by Ion Doping Control for Energy Storage System (에너지 저장장치용 슈퍼커패시터 이온 도핑 제어를 통한 에너지 밀도 향상 연구)

  • Park, Byung-jun;Yoo, SeonMi;Yang, SeongEun;Han, SangChul;No, TaeMoo;Lee, Young Hee;Han, YoungHee
    • KEPCO Journal on Electric Power and Energy
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    • v.5 no.3
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    • pp.209-213
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    • 2019
  • Recently, demand for high energy density and long cycling stability of energy storage system has increased for application using with frequency regulation (F/R) in power grid. Supercapacitor have long lifetime and high charge and discharge rate, it is very adaptable to apply a frequency regulation in power grid. Supercapacitor can complement batteries to reduce the size and installation of batteries. Because their utilization in a system can potentially eliminate the need for short-term frequent replacement as required by batteries, hence, saving the resources invested in the upkeep of the whole system or extension of lifecycle of batteries in the long run of power grid. However, low energy density in supercapacitor is critical weakness to utilization for huge energy storage system of power grid. So, it is still far from being able to replace batteries and struggle in meeting the demand for a high energy density. But, today, LIC (Lithium Ion Capacitor) considered as an attractive structure to improve energy density much more than EDLC (Electric double layer capacitor) because LIC has high voltage range up to 3.8 V. But, many aspects of the electrochemical performance of LIC still need to be examined closely in order to apply for commercial use. In this study, in order to improve the capacitance of LIC related with energy density, we designed new method of pre-doping in anode electrode. The electrode in cathode were fabricated in dry room which has a relative humidity under 0.1% and constant electrode thickness over $100{\mu}m$ was manufactured for stable mechanical strength and anode doping. To minimize of contact resistance, fabricated electrode was conducted hot compression process from room temperature to $65^{\circ}C$. We designed various pre-doping method for LIC structure and analyzing the doping mechanism issues. Finally, we suggest new pre-doping method to improve the capacitance and electrochemical stability for LIC.

Electrochemical Characteristics of the Activated Carbon Electrode Modified with the Microwave Radiation in the Electric Double Layer Capacitor (전기이중층캐패시터에서 마이크로파에 의해 개질된 활성탄소전극의 전기화학적 특성)

  • Sun, Jin-Kyu;Um, Eui-Heum;Lee, Chul-Tae
    • Applied Chemistry for Engineering
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    • v.21 no.1
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    • pp.11-17
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    • 2010
  • Modifying surface of activated carbon for the electrode of EDLC with an organic electrolyte was investigated to improve the electrochemical performance of EDLC by the microwave radiation. Three kinds of activated carbons, prepared activated carbon from petroleum cokes and pitch cokes and commercial activated carbon BP-25, were used for this study. For all investigated activated carbons, hydrophilic functional groups-containing oxygen disappeared from the surface of activated carbon as microwave radiation. And as microwave radiation time was increased, the specific surface area and total pore volume of activated carbons were reduced and average pore diameter were increased. From theses effects, interfacial resistance of EDLC with the modified activated carbon electrode was drastically decreased, and discharge capacitance was increased although the specific surface area of activated carbon was reduced by this microwave radiation.

Development of Schottky Diode for THz Applications using Heterogeneous Resist Patterning (이종 레지스트 패터닝을 이용한 테라헤르츠용 쇼트키 다이오드 개발)

  • Han, Min;Choi, Seok-Gyu;Lee, Sang-Jin;Baek, Tae-Jong;Ko, Dong-Sik;Kim, Jung-Il;Kim, Geun-Ju;Jeon, Seok-Gy;Yoon, Jin-Seob;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.8
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    • pp.47-54
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    • 2012
  • In this paper, we have fabricated the Schottky diode for THz applications by heterogeneous resist patterning method. The Schottky diode was developed using electron beam lithography and photolithography to connect the anode and the anode pad for a simple process. The measured performance of developed Schottky diode are $11.2{\Omega}$ of series resistance, 25.96 fF of junction capacitance, 1.25 of ideality factor and 547.6 GHz of cut-off frequency.

An Improved Timing-level Gate-delay Calculation Algorithm (개선된 타이밍 수준 게이트 지연 계산 알고리즘)

  • Kim, Boo-Sung;Kim, Seok-Yoon
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.8
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    • pp.1-9
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    • 1999
  • Timing-level circuit analyses are used to obtain fast and accurate results, and the analysis of gate and interconnect delay is necessary to validate the correctness of circuit design. This paper proposes an efficient algorithm which simultaneously calculates the gate delay and the transition time of linearized voltage source for subsequent interconnect delay calculation. The notion of effective capacitance is used to calculate the gate delay and the transition time of linearized voltage source which considers the on-resistance of driving gate. The procedure for obtaining the gate delay and the transition time of linearized voltage source has been developed through an iterative operation using the precharacterized data of gates. While previous methods require extra information for the transition time calculation of linearized voltage sources, our method uses the derived data during the gate delay calculation process, which does not require any change in the precharacterization process.

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Optimal circuit desgn Taking into Account The frquency dependence of coil's Q (자심코일의 Q의 주파수특성을 고려한 회로의 최적화설계)

  • 박송배
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.4
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    • pp.23-28
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    • 1974
  • One of the consistent nuisances in accurate design of circuits containing coils with core is how to take into account the frequency dependence of Q of actual coils. The conventional equivalent circuit consisting of an inductance and a series (constant) resistance and possibly a parallel (constant) capacitance is of little use in this situation since the core loss itself is strongly dependent on the frequency. In order to circumvent this difficulty, in this paper, a mathematical expression for Q of a given core as a function of inductance and frequency is first assumed and parameters in this expression are optimiged so as to best fit the data provided by the core manufacturer or obtained experimentally. This expression is then utilized in accurate calculation of the frequency response of a given circuit required in the optimal design of circuits containing coils. In other words the proposed approach is an effective combination of an approximate expression of coil's Q and circuit optimisation technique, which seems to have solved, to a great extent, the stated difficulty associated with actual coils. As for the optimization technique, ths Fletcher-Powell procedure was employed and one example was given to illustrate the proposed approach.

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Simple Modeling of Floor Heating Systems based on Optimal Parameter Settings (최적 파라미터를 이용한 단순 모델 기반 바닥 난방 시스템 모델링)

  • Park, Seung Hoon;Jang, Yong Sung;Kim, Eui-Jong
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.29 no.9
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    • pp.472-481
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    • 2017
  • Radiant floor heating systems have been used as common heating supply systems in most residential buildings in Korea. Since the system uses a floor as thermal storage, proper control strategy should be adopted to avoid over-or under-heating problems. So far, studies related to control of the floor heating system have been conducted based on computer simulations. The active layer in TRNSYS is known for its usability as a floor heating system model and is integrated with the TRNSYS building model (Type 56). However, floor heating system simulations with the active layer are operated only if pre-defined minimum mass flow rate is ensured. This study proposes a simple RC (Resistance-Capacitance) model for radiant floor heating systems. Model parameters such as Rs and Cs are defined by optimization. The active layer, in this study, is used as the target system to search for optimal values. A TRNOPT optimization tool was used to conduct optimization under given simulation conditions. The RC model with optimal parameters are tested in other mass flow rates that were not used during optimization. Results reveal the RC model describes the active layer with successfully optimized model parameters. The RC model has fewer model limitations, and is expected to be used for various target systems, e.g. experimental data of a real radiant heating system.

A 4-channel 3.125-Gb/s/ch VCSEL driver Array (4-채널 3.125-Gb/s/ch VCSEL 드라이버 어레이)

  • Hong, Chaerin;Park, Sung Min
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.1
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    • pp.33-38
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    • 2017
  • In this paper, a 4-channel common-cathode VCSEL diode driver array with 3.125 Gb/s per channel operation speed is realized. In order to achieve faster speed of the switching main driver with relatively large transistors, the transmitter array chip consists of a pre-amplifier with active inductor stage and also an input buffer with modified equalizer, which leads to bandwidth extension and reduced current consumption. The utilized VCSEL diode provides inherently 2.2 V forward bias voltage, $50{\Omega}$ resistance, and 850 fF capacitance. In addition, the main driver based upon current steering technique is designed, so that two individual current sources can provide bias currents of 3.0 mA and modulation currents of 3.3 mA to VCSEL diodes. The proposed 4-channel VCSEL driver array has been implemented by using a $0.11-{\mu}m$ CMOS technology, and the chip core occupies the area of $0.15{\times}0.18{\mu}m^2$ and dissipates 22.3 mW per channel.

Interaction of DEMS with H-terminated Si(001) surface : a first principles (DEMS와 H-terminated Si (001) 표면의 상호작용: 제일원리연구)

  • Kim, Dae-Hyun;Kim, Dae-Hee;Park, So-Yeon;Seo, Hwa-Il;Lee, Do-Hyeong;Kim, Yeong-Cheol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.117-117
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    • 2009
  • 최근 고집적화 구조는 저항(resistance)과 정전용량 (capacitance)에 의한 신호 지연 (RC delay) 증가로 인한 혼선 (cross-talk noise)과 전력소모 (power dissipation)등의 문제를 발생시킨다. 칩 성능에 영향을 미치는 제한인자를 최소화하기 위해서는 저저항 배선 금속과 저유전상수 (low-k)의 층간 절연막 (IMD, intermetal dielectric) 물질이 필요하다. 최근 PECVD (plasma enhanced chemical vapor deposition)를 이용하여 증착시킨 유기살리케이트 (OSG, organosilicate glass)는 가장 유망한 저유전상수 물질로 각광받고 있다. 본 연구에서는 제일원리 연구를 통하여 OSG의 전구체 중에 하나인 DEMS 문자를 모델링하고, 에너지적으로 가장 안정한 구조를 찾아서 각 원자 간의 결합에 따른 해리에너지 (dissociation energy)를 계산하고, DEMS가 H-terminated Si 표면과 반응하는 기구에 대해 고찰하였다. 최적화된 DEMS 분자의 구조를 찾았고 DEMS 분자가 결합이 깨져 조각 분자군으로 될 때의 에너지들을 계산하였다. 계산된 해리에너지로부터 DEMS 분자의 O 원자와 C분자의 결합이 깨져서 $C_2H_5$를 조각 분자군으로 생성할 확률이 총 8가지의 경우에서 가장 높다는 것을 알 수 있었다. 8 가지의 해리된 DEMS 조각 분자군들이 H-terminated Si 표면과 반응할 때의 반응에너지를 계산한 결과 표면의 Si 원자와 DEMS 분자에서 $C_2H_5$가 해리되어 생성된 조각 분자군의 O 원자가 결합을 하고 부산물로 $C_2H_6$를 생성하는 반응이 가장 선호된다는 것을 알 수 있었다. DEMS 분자로 증착시킨 OSG에 대하여 제일원리법을 이용하여 계산한 연구는 보고된 바 없기 때문에, DEMS 분자의 각 원자 간의 해리에너지와 Si 기판과의 반응에너지는 추후 연구개발의 중요한 기초 자료가 될 수 있다.

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CMOS Rectifier for Wireless Power Transmission Using Multiplier Configuration (Multiplier 설정을 통한 무선 전력 전송 용 CMOS 정류 회로)

  • Jeong, Nam Hwi;Bae, Yoon Jae;Cho, Choon Sik
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.56-62
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    • 2013
  • We present a rectifier for wireless power transmission using multiplier configuration in layout for MOSFETs which works at 13.56 MHz, designed to fit in CMOS process where conventionally used diodes are replaced with the cross-coupled MOSFETs. Full bridge rectifier structure without comparators is employed to reduce current consumption and to be working up to higher frequency. Multiplier configuration designed in layout reduces time delay originated from parasitic series resistance and shunt capacitance at each finger due to long connecting layout, leading to fast transition from on-state to off-state cross-coupled circuit structure and vice versa. The power conversion efficiency is significantly increased due to this fast transition time. The rectifier is fabricated in $0.11{\mu}m$ CMOS process, RF to DC power conversion efficiency is measured as 86.4% at the peak, and this good efficiency is maintained up to 600 MHz, which is, to our best knowledge, the highest frequency based on cross-coupled configuration.