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http://dx.doi.org/10.5573/ieek.2013.50.12.056

CMOS Rectifier for Wireless Power Transmission Using Multiplier Configuration  

Jeong, Nam Hwi (School of Electronics, Telecommunication and Computer Engineering, Korea Aerospace university)
Bae, Yoon Jae (School of Electronics, Telecommunication and Computer Engineering, Korea Aerospace university)
Cho, Choon Sik (School of Electronics, Telecommunication and Computer Engineering, Korea Aerospace university)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.12, 2013 , pp. 56-62 More about this Journal
Abstract
We present a rectifier for wireless power transmission using multiplier configuration in layout for MOSFETs which works at 13.56 MHz, designed to fit in CMOS process where conventionally used diodes are replaced with the cross-coupled MOSFETs. Full bridge rectifier structure without comparators is employed to reduce current consumption and to be working up to higher frequency. Multiplier configuration designed in layout reduces time delay originated from parasitic series resistance and shunt capacitance at each finger due to long connecting layout, leading to fast transition from on-state to off-state cross-coupled circuit structure and vice versa. The power conversion efficiency is significantly increased due to this fast transition time. The rectifier is fabricated in $0.11{\mu}m$ CMOS process, RF to DC power conversion efficiency is measured as 86.4% at the peak, and this good efficiency is maintained up to 600 MHz, which is, to our best knowledge, the highest frequency based on cross-coupled configuration.
Keywords
Wireless power transmission; Power conversion efficiency; Rectifier; Layout parasitic; Multiplier;
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