• Title/Summary/Keyword: Regulator design

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Design of Output Regulator for Rejecting Periodic Eccentricity Disturbance in Optical Disc Drive

  • Shim, Hyung-Bo;Kim, Hyung-Jong;Chung, Chung-Choo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.452-457
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    • 2003
  • An add-on type output regulator is proposed in this paper. By an add-on controller we mean an additional controller which operates harmonically with a pre-designed one. The role of the add-on controller is to reject a sinusoidal disturbance of unknown magnitude and phase but with known frequency. Advantages of the proposed controller include that (1) it can be used only when the performance of disturbance rejection needs to be enhanced, (2) when it is turned on or off, unwanted transient can be avoided (i.e., bumpless transfer), (3) it is designed for perfect disturbance rejection not just for disturbance reduction, (4) ability for perfect rejection is preserved even with uncertain plant model. This design may be promising for optical disc drive (ODD) systems in which disc eccentricity results in a sinusoidal disturbance. For ODD systems, the sensitivity function obtained by the pre-designed controller, which may have been designed by the lead-lag, $H_{\infty}$, or DOB (disturbance observer) technique, does not change much with the add-on controller except at the frequency of the disturbance. Since the add-on controller does the job of rejecting major eccentricity disturbance, the gain of the pre-designed controller does not have to be too high.

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이중 루프 Digital LDO Regulator 용 ADC 설계 (Design of ADC for Dual-loop Digital LDO Regulator)

  • 박상순;전정희;이재형;최중호
    • 전기전자학회논문지
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    • 제27권3호
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    • pp.333-339
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    • 2023
  • 세계적으로 웨어러블 디바이스의 시장이 확장하고 있으며, 이를 위한 효율적인 PMIC의 수요 또한 늘어나고 있다. 웨어러블 디바이스용 PMIC 특성상 높은 에너지 효율과 작은 면적이 필요하다. 프로세스 기술의 발전으로 저전력 설계가 가능하지만, 기존의 아날로그 LDO 레귤레이터는 전원 전압이 낮아짐에 따라 설계의 어려움이 있다. 본 논문에서는 이중 루프 디지털 LDO용 coarse-fine ADC를 제안한다, ADC의 설계는 55 nm CMOS 공정으로 진행하였고 34.78 dB와 5.39 bits의 SNR과 ENOB를 갖는다.

적응 IP 제어기를 이용한 유도전동기의 벡터제어 (Vector Control of Induction Motor using Adaptive IP Controller)

  • 조지원;이정민;박수영;최규하;김한성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 하계학술대회 논문집
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    • pp.631-636
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    • 1991
  • In vector control of induction motor, to improve stability of system generated by load and disturbance have used the speed controller, however this regulator is unquestionably the most common PI controller. If it is tuned, it's performance become sactisfactory. In spite of this, in system requiring more complete control algorithms, the ability of controller is losed totally. Therefore, in this system, it is requiring to tune controller and to design more complex regulator. It may also be costly and time consuming to tune such regulator. This paper proposes in vector control that implement more complete speed control using adaptive IP controller.

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Determination of Regulator Parameters and Transient Analysis of Modified Self-commutating CSI-fed IM Drive

  • Pandey, A.K.;Tripathi, S.M.
    • Journal of Electrical Engineering and Technology
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    • 제6권1호
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    • pp.48-58
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    • 2011
  • In this paper, an attempt has been made to design the current and speed proportional and integral (PI) regulators of self-commutating current source inverter-fed induction motor drive having capacitors at the machine end and to investigate the transient performance of the same for step changes in reference speed. The mathematical model of the complete drive system is developed in closed loop, and the characteristic equations of the systems are derived using perturbation about steady-state operating point in order to develop the characteristic equations. The D-partition technique is used for finding the stable region in the parametric plane. Frequency scanning technique is used to confirm the stability region. Final selection of the regulator parameters is done by comparing the transient response of the current and speed loops for step variations in reference. The performance of the drive is observed analytically through MATLAB simulation.

정착시간과 레귤레이션 특성을 개선한 LDO(Low Dropout Regulator)의 설계 (A Design of LDO(Low Dropout Regulator) with Enhanced Settling Time and Regulation Property)

  • 박경수;박재근
    • 전기학회논문지P
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    • 제60권3호
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    • pp.126-132
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    • 2011
  • A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP's DC Gain and Bandwidth can't optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can't improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6mV/V, 0.25mV/mA, respectively. And measured settling time is 1.5us in 5V supply voltage.

반 능동형 RFID 태그를 위한 전원 제어 회로 설계 및 구현 (Design and Implementation of Power Management Circuit for Semi-active RFID Tags)

  • 김영교;이경일;조성규;남기훈;김시호
    • 전기학회논문지
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    • 제59권10호
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    • pp.1839-1844
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    • 2010
  • A power management controller circuit with switched capacitor mode down regulator and battery charger block for semi-active RFID tags was proposed and fabricated. The main purposes of the proposed switched capacitor mode down regulator and battery charger block are to reduce standby current and to provide a self-controlled thin film battery charger by detecting the received RF power, respectively. Fabricated chip area is $360,000{\mu}m^2$ and measured standby current was about $1.3{\mu}A$. To further reduction of standby current, a wake-up circuit has to be included in the power management controller.

초소형 수동형 유체 압력 조정기 제작 및 실험 (Fabrication and Test of a Micro Passive Liquid Pressure Regulator)

  • 이기정;임인호;심우영;양상식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.1482-1483
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    • 2008
  • This report describes the design, fabrication and experimental results of an implantable micro pressure regulator. It consists of three silicon substrates, a glass substrate, and a PDMS layer. Silicon and glass substrates are fabricated by using bulk micro machining and sandblasting. The PDMS layer is used as a intermediate layer for Si-Si and Si-glass bonding processes. This micro regulator is a key component of the portable drug delivery systems for low power consumption. The device has some advantages, such as a passive type device, no power consumption, and simple structure.

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압력조절밸브와 배관 특성을 포함한 유도무기용 기체 블로우다운 시스템의 공압부 모델링에 관한 연구 (A Study on Modeling of the Pneumatic Part in a Gas Blow-Down System Including Pressure Regulator and Pipe-Line Characteristics)

  • 박영우
    • 드라이브 ㆍ 컨트롤
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    • 제14권3호
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    • pp.32-39
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    • 2017
  • In this study, a mathematical model of the pneumatic part in a gas blow-down system is proposed. The mathematical model consists of four major parts: pressure vessel, reservoir, pressure regulator and pipe-line. To ensure accuracy in long-time simulations, heat transfer between gas and pressure vessel is considered. The model is validated by comparing simulation results with experimental data. Experiments are conducted on the ground, where free convection can be assumed. Simulation results indicate the proposed model can accurately describe behavior of a gas blow-down system. Therefore, it may be used for design and analysis of similar systems with a slight modification.

A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications

  • Giustolisi, Gianluca;Palumbo, Gaetano;Spitale, Ester
    • ETRI Journal
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    • 제32권4호
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    • pp.520-529
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    • 2010
  • In this paper, we present a low-voltage low-dropout voltage regulator (LDO) for a system-on-chip (SoC) application which, exploiting the multiplication of the Miller effect through the use of a current amplifier, is frequency compensated up to 1-nF capacitive load. The topology and the strategy adopted to design the LDO and the related compensation frequency network are described in detail. The LDO works with a supply voltage as low as 1.2 V and provides a maximum load current of 50 mA with a drop-out voltage of 200 mV: the total integrated compensation capacitance is about 40 pF. Measurement results as well as comparison with other SoC LDOs demonstrate the advantage of the proposed topology.

최적 Regulator를 이용한 도립진자 시스템의 안정화 제어 (Stabilzed Control of an Inverted Pendulum Cart System Using the Optimal Regulator)

  • 박영식;최부귀
    • 한국통신학회논문지
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    • 제15권4호
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    • pp.315-323
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    • 1990
  • 고유 불안정한 도립진자 시스템의 동적 안정화 제어기 설계기법이 소개된다. 복잡한 비선형을 고려한 수학적 모델링과 C.D.Johnson에 의해 제시된 안정화 제어 이론을 도립진자의 상태공간 모델에 적용하여, 최적 레귤레이터형 안정화 제어기를 설계하였으며, 컴퓨터 시뮬레이션 및 실험결과가 만족스럽게 나타났다.

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