• Title/Summary/Keyword: Regulator IC

Search Result 66, Processing Time 0.025 seconds

Failure Analysis of Regulator IC (Regulator IC 고장분석 사례)

  • 이재혁;하종신;차승규;박상득
    • Proceedings of the Korean Reliability Society Conference
    • /
    • 2002.06a
    • /
    • pp.123-129
    • /
    • 2002
  • 본 논문에서는 Regulator IC의 불량원인 규명을 통해 반도체 고장분석 방법 및 개선사례를 소개하고자 한다. 고장분석에 사용된 반도체 Package는 8Pin MSOP(Mini Small Outline Package)로, 시장 불량품을 분석한 결과 Regulator IC의 Stitch Bond에 Heel Crack이 발생하여 불안정한 출력을 발생시킴을 알 수 있었다. Stitch Bond Heel Crack의 원인은 Lead Frame부의 박리(Delamination)에 의해 열이나 진동 등의 외부 Stress가 직접 Stitch Bond에 가해져 Crack이 발생된 것으로, Reflow 재현시험을 통해 확인 할 수 있었다. 박리 발생에 의한 Stitch Bond Heel Crack 방지 대책으로 첫째, Bonding Type을 Stitch Bond 에서 Ball Bond로 변경하여 강도를 개선하고 둘째, PCB Layout 변경을 통해 외력이 직접 Regulator IC에 가해지지 않도록 하였다. 개선 결과 현재까지 시장에서 동일 불량은 발생하지 않았다.

  • PDF

A study on the design of High current and Low Drop Out-voltage Regulator IC using BCD Technology (BCD 기술을 이용한 고전류 및 Low Drop Out-voltage Regulator IC 설계에 관한 연구)

  • Park, Tae-Su;Choi, In-Chul;Lee, Jo-Woon;Koo, Yong-Seo
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.937-940
    • /
    • 2005
  • In this paper, the design of high current and high performance Regulatior IC using BCD Technology are presented. We design the 5A class regulator IC including the VDMOS Pass Tr. of N-sink array structure. Also, to obtain the high current and low power characteristics, the PMOS and BJT device are adapted for the Pass Tr. It is shown that simulation results of Regulator IC with VDMOS Pass Tr. have the Iout=4.5092A, LDO=7.3mV.

  • PDF

Derating Design Approach for a Regulator IC (레귤레이터 IC의 부하경감 설계)

  • Kim, Jae-Jung;Chang, Seog-Weon
    • Journal of Applied Reliability
    • /
    • v.7 no.1
    • /
    • pp.1-11
    • /
    • 2007
  • This paper presents a derating design approach for reliability improvement of a regulator IC. The IC is usually used in SMPS. The main failure mechanism of interest is voltage drop due to the package delamination mainly caused by two stresses, i.e. temperature and current. The lifetime under stresses is modeled as a function of stresses and time using accelerating life testings. Quantitative and qualitative variation in lifetime according to stress variations are investigated using the modeled lifetime. Stress levels would be determined to achieve required reliability levels in the aspect of derating design for reliability.

  • PDF

Design of an Active Current Regulator for LED Driver IC (LED 구동 IC를 위한 능동 전류 조절기의 설계)

  • Yun, Seong-Jin;Oh, Tak-Jun;Jo, A-Ra;Ki, Seok-Lip;Hwang, In-Chul
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.61 no.4
    • /
    • pp.612-616
    • /
    • 2012
  • This paper presents an active current regulator for LED driver IC. The proposed driver circuit is consists of DC-DC converter for supplying constant DC voltage to LED, active current regulator for compensating channel-to-channel current error from LED strings and feedback circuit for controlling duty ratio of the converter. The proposed active current regulator senses current of LED channels by equalizing both $V_{DS}$ and $V_{GS}$ at LED current control transistor. Because the proposed circuit directly measures the LED channel current without a sensing resistor and regulates all channel with same regulation loop, the power consumption and the current error are much small compared with previous works. The measured maximum efficiency of overall LED driver IC is approximately 94% and current error of LED channel-to-channel is under ${\pm}1.3%$. The proposed LED driver IC is fabricated Dongbu 0.35um BCD process.

High Efficiency Multi-Channel LED Driver IC with Low Current-Balance Error Using Current-Mode Current Regulator

  • Yoon, Seong-Jin;Cho, Je-Kwang;Hwang, In-Chul
    • Journal of Electrical Engineering and Technology
    • /
    • v.12 no.4
    • /
    • pp.1593-1599
    • /
    • 2017
  • This paper presents a multi-channel light-emitting diode (LED) driver IC with a current-mode current regulator. The proposed current regulator replaces resistors for current sensing with a sequentially controlled single current sensor and a single regulation loop for sensing and regulating all LED channel currents. This minimizes the current mismatch among the LED channels and increases voltage headroom or, equivalently, power efficiency. The proposed LED driver IC was fabricated in a $0.35-{\mu}m$ BCD 60-V high voltage process, and the chip area is $1.06mm^2$. The measured maximum power efficiency is 93.4 % from a 12-V input, and the inter-channel current error is smaller than as low as ${\pm}1.3%$ in overall operating region.

Electrical Characteristics of Power Switching Sensor IC fabricated in Bipolar-CMOS-DMOS Process (BCD 프로세스를 이용한 파워 스위칭 센서 IC의 제작과 특성 연구)

  • Kim, Sunjung
    • Journal of IKEEE
    • /
    • v.20 no.4
    • /
    • pp.428-431
    • /
    • 2016
  • Power semiconductor devices had been producted with bipolar only processes, but Bipolar-CMOS-DMOS(BCD) processes have been adapted recently to fabricate these devices since most foundry companies have provided BCD processes instead of Bipolar only processes. In this study, Regulator and OP Amp are used as most popular design IPs and BCD processes for the designing are converted from bipolar only processes. Power Switching Sensor(PSS) ICs are designed specifically and fabricated on a silicon chip. The operation results of the packaged chip show the good matching with test results of the simulation.

Design of Power Management Pre-Regulator Using a JFET Characteristic (JFET 특성을 이용한 Power Management IC의 Pre-Regulator 설계)

  • Park, Heon;Kim, Hyoung-Woo;Seo, Kil-Soo;Kim, Young-Hee
    • Proceedings of the KIEE Conference
    • /
    • 2015.07a
    • /
    • pp.1020-1021
    • /
    • 2015
  • 본 논문에서는 상용전압 AC 220V를 인가전압으로 사용하여 PMIC(Power Management IC)의 구동에 적합한 전압을 인가해주는 Pre-Regulator를 설계하였다. 설계된 Pre-Regulator는 상용전압을 사용하기 때문에 Device의 내압이 700V인 Magnachip $0.35{\mu}m$ BCD 공정을 이용하여 설계되었으며, 회로의 구성은 저전압 입력 보호 기능 및 JFET의 구동 제어를 위한 Under Voltage Lock Out(UVLO)회로, 전압조정기(Regulator)의 기준전압을 생성해주는 밴드갭 기준전압 발생(Bandgap Reference)회로, LDO(Low Drop Out)회로로 구성되어있다.

  • PDF

Implementation of Single-Phase Energy Measurement IC (단상 에너지 측정용 IC 구현)

  • Lee, Youn-Sung;Seo, Hae-Moon;Kim, Dong Ku
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.40 no.12
    • /
    • pp.2503-2510
    • /
    • 2015
  • This paper presents a single-phase energy measurement IC to measure electric power quantities. The entire IC includes two programmable gain amplifiers (PGAs), two ${\sum}{\Delta}$ modulators, a reference circuit, a low-dropout (LDO) regulator, a temperature sensor, a filter unit, a computation engine, a calibration control unit, registers, and an external interface block. The proposed energy measurement IC is fabricated with $0.18-{\mu}m$ CMOS technology and housed in a 32-pin quad-flat no-leads (QFN) package. It operates at a clock speed of 4,096 kHz and consumes 10 mW in 3.3 V supply.

A White-LED Driver IC for Mobile Applications (모바일용 White-LED Driver IC)

  • Ko, Young-Seok;Park, Shi-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.04b
    • /
    • pp.39-40
    • /
    • 2009
  • This paper presents a white-LED driver IC for a mobile application. It uses a high efficiency current mode boost converter method for a low voltage application. For a LED drive, it provides a PWM(Pulse Width Modulation) and analog dimming function. The device was designed and fabricated using 0.35um BCD process. The evaluated waveforms for an implemented IC show promising results.

  • PDF

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
    • /
    • v.15 no.6
    • /
    • pp.1673-1681
    • /
    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.