• Title/Summary/Keyword: Regulator 설계

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Worst Case Analysis for General Conventional Linear Regulator (일반적인 재래식 선형 전압 조절기의 최악 조건 해석)

  • Lee, Yun-Ki;Kwon, Ki-Ho;Choi, Seung-Woon;Lee, Sang-Kon
    • Aerospace Engineering and Technology
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    • v.8 no.1
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    • pp.162-171
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    • 2009
  • Linear regulator for generating various voltages in satellite electronics is implemented with radiation harden regulator chips or simple linear regulator circuits. For implementing linear regulator circuits, the detail design can be various. But the worst case analysis method and interesting analysis items for the linear regulator circuits can be generalized. So this paper describes and summarizes the general worst case analysis method and interesting analysis items for the conventional linear regulator circuits.

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A Active Replica LDO Regulator with DC Matching Circuit (DC정합회로를 갖는 능동 Replica LDO 레귤레이터)

  • Ryu, In-Ho;Bang, Jun-Ho;Yu, Jae-Young
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.6
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    • pp.2729-2734
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    • 2011
  • In this paper, an active replica Low-dropout(LDO) regulator with DC voltage matching circuit is presented. In order to match the voltage between replica and output of regulator, DC voltage matching circuit is designed. The active replica low dropout regulator has higher Power Supply Rejection(PSR) than that of conventional regulator. The designed DC voltage matching circuit can reduce the drawback that may be occurred in replica regulator. And using fully active element in regulator can reduce the chip area and heat noise with resistor. As results of HSPICE simulation with 0.35um CMOS parameter, the designed active replica LDO regulator achieves Power Supply Rejection, -28@10Hz better than -17@10Hz of conventional replica regulator without DC matching circuit. And the output voltage is 3V.

Design of Power Management Pre-Regulator Using a JFET Characteristic (JFET 특성을 이용한 Power Management IC의 Pre-Regulator 설계)

  • Park, Heon;Kim, Hyoung-Woo;Seo, Kil-Soo;Kim, Young-Hee
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.1020-1021
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    • 2015
  • 본 논문에서는 상용전압 AC 220V를 인가전압으로 사용하여 PMIC(Power Management IC)의 구동에 적합한 전압을 인가해주는 Pre-Regulator를 설계하였다. 설계된 Pre-Regulator는 상용전압을 사용하기 때문에 Device의 내압이 700V인 Magnachip $0.35{\mu}m$ BCD 공정을 이용하여 설계되었으며, 회로의 구성은 저전압 입력 보호 기능 및 JFET의 구동 제어를 위한 Under Voltage Lock Out(UVLO)회로, 전압조정기(Regulator)의 기준전압을 생성해주는 밴드갭 기준전압 발생(Bandgap Reference)회로, LDO(Low Drop Out)회로로 구성되어있다.

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An Improved Linear Sampled-data Output Regulator (개선된 선형 샘플치 출력 조절기)

  • Chung, Sun-Tae
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.10
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    • pp.85-93
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    • 1998
  • In general, the solvability of linear robust output regulation problem are not preserved under time-sampling. Thus, it is found that the digital regulator implemented by time-sampling of analog output regulator designed based on the continuous-time linear system model is nothing but a 1st order approximation with respect to time-sampling. However, one can design an improved sampled-data regulator with respect to sampling time by utilizing teh intrinsic structure of the system. In this paper, we study the system structures for which it is possible to design an improved sampled-data regulator with respect to sampling time.

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LDO Regulator with Pseudo Resistor Using Feedback Network (피드백 네트워크를 사용한 Pseudo 저항을 갖는 LDO 레귤레이터)

  • Jung, Jun-Mo
    • Journal of IKEEE
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    • v.20 no.1
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    • pp.119-122
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    • 2016
  • In this paper, we propose LDO regulator to operate using Pseude resistor instead of widely used Feedback resistor in conventional LDO regulator. Proposed Feedback network using Pseudo resistor has smaller area than the conventional feedback resistor and plays the role of an conventional LDO regulator. Thus, it has been proposed to compensate for the disadvantages of LDO regulator with noise. Although proposed LDO regulator compared with conventional LDO regulator has similar performance, this LDO regulator provide higher efficiency by reducing the overshoot and decreasing the area. This circuit was designed to using a Dongbu Hitek 0.18um CMOS process.

A real time regulator of plasma properties (실시간 플라즈마 특성 조정기)

  • Lee, Dong-Ho;Kim, Byeong-Hwan;Lee, Hak-Seong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2009.10a
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    • pp.229-230
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    • 2009
  • 본 연구에서는 플라즈마 기본 변수인 전자밀도, 전자온도, 그리고 이온 유량을 제어하는 조정기를 설계하였다. 플라즈마 증착장비를 이용하여 상온에서 SiN 박막을 증착하는 과정에서 in-situ 센서인 Wise Probe를 이용하여 데이터를 수집하였다. 수집된 데이터를 이용하여 플라즈마 확인 (Identification) 모델을 개발하고, 이를 이용하여 Linear Quadratic Regulator를 설계하였다. Noise와 Disturbance에 대한 응답특성을 고찰하였으며, 설계된 Regulator는 비교적 안정된 반응을 보였다.

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Design of Dual Pressure Regulator (이중압력 조절기 설계)

  • Kim, Dong-Soo;Kim, Kang-Dae;Kim, Myoung-Sub
    • Proceedings of the KSME Conference
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    • 2008.11a
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    • pp.1226-1229
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    • 2008
  • In this paper, we designed sandwich type pressure regulator for air pressure control system. As a result of research, we obtained several important conclusions. First, we decided theory of poppet valve and relief valve which are used in sandwich type pressure regulator, and then designed prototype of pressure regulator. Second, we organized circuit diagram of dual pressure regulator of air pressure control system.

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Synthesis of robust linear quadratic regulator (Robust linear quadratic regulator의 설계)

  • 김종철
    • 제어로봇시스템학회:학술대회논문집
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    • 1986.10a
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    • pp.275-280
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    • 1986
  • 본 연구는 LQR을 Robust하게 설계하는 방법을 다루었다. Unstructured Perturbation에 대응하기 좋으며 쉽게 다룰 수 있는 주파수 응답형 LQR criteria 선정법과, LQR의 변형으로서 Structured Perturbation에 대하여 유효한 Performance Criteria Insensitive Control을 제시하고 효과를 살펴보았다.

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An Analysis of n VCO Voltage Regulator for Reducing the Effect of Power Supply Noise (전원 잡음 영향을 줄이기 위한 VCO 정전압기 분석)

  • Heo, Hoh-Young;Jeong, Hang-Geun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.2
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    • pp.269-273
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    • 2009
  • A voltage regulator can be used to reduce the effect of the power-supply noise on the control voltage of the VCO. An accurate analysis of the voltage regulator circuit is needed for the optimal design of the voltage regulator. This paper clarifies an inaccuracy in a recent paper on the replica-compensated regulator far supply-regulated PLLs: neglect of MOSFET parasitic capacitances. As a consequence, an improved analytical model is derived for the replica-compensated voltage regulator. The derived model is verified through circuit simulation. The voltage regulator has been fabricated in a standard $0.18{\mu}m$ 1P6M CMOS technology. The chip area is $1mm^2$.

Design and Performance Evaluation of a Flow Regulator for Thrust Control of a Liquid Rocket Engine (액체로켓엔진 추력제어를 위한 유량제어밸브의 설계 및 성능 평가)

  • Jung, Tae-Kyu
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2012.05a
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    • pp.443-446
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    • 2012
  • A thrust control valve of a liquid rocket engine plays a role to increase or decrease the thrust of an LRE by modulating the flow rate of propellant into a gas-generator. This paper deals with a flow regulator that has functions of not only modulating thrust but also maintaining constant flow rate regardless of pressure change at inlet or outlet of the flow regulator. A direct acting flow regulator was fabricated and tested for the comparison of experimental and simulation results under steady-state conditions. The drawbacks and limitations of the flow regulator were analyzed. Also the new design of a flow regulator was proposed.

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