• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.600-602
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• 1998

In this paper, we implement BIST to efficiently test circuits with pipeline architecture and JTAG to control implemented BIST and support board level test. Since implemented BIST is designed to be initialized using new seed, hard-to-detect faults are easily detected. Besides, to optimize area overhead, it uses JTAG instead of BIST controller and modified pipeline register instead of added test pattern generator and signature generator. And, to optimize pin overhead, it uses pins of JTAG. Function and efficiency of implemented BIST is verified by simulation.

• International Journal of Naval Architecture and Ocean Engineering
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• v.9 no.2
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• pp.177-184
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• 2017

The Coanda effect is the phenomenon of a fluid jet to stay attached to a curved surface; when a jet stream is applied tangentially to a convex surface, lift force is generated by increase in the circulation. The Coanda effect has great potential to be applied practically applied to marine hydrodynamics where various lifting surfaces are being widely used to control the behavior of ships and offshore structures. In the present study, Numerical simulations and corresponding experiments were performed to ascertain the applicability of the Coanda effect to a horn-type rudder. It was found that the Coanda jet increases the lift coefficient of the rudder by as much as 52% at a jet momentum coefficient of 0.1 and rudder angle of $10^{\circ}$.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.61-63
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• 1987

In this paper, we develope a system which can perform signal processing for bar-code laser scanner. This system is composed of optical detector and preprocessor. The former detects the diffused light and converts it into TTL lebel output. The latter discriminator valid data from various raw data and transmits data to micro-processor. The preprocessor consists of edge transition detector, latch signal generator, module counter, register array, adder array, and buffer memory control circuit etc..

• Journal of Semiconductor Engineering
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• v.1 no.3
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• pp.81-87
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• 2020

An instrumentation amplifier (IA) and an analog-to-digital converter (ADC) are essential circuit blocks for accurate and robust sensor readout systems. This paper introduces recent advances in radiation-hardening by design (RHBD) techniques applied for the sensor readout integrated circuits (IC), e.g., the three-op-amp IA and the successive-approximation register (SAR) ADC, operating against total ionizing dose (TID) and singe event effect (SEE) in harsh radiation environments. The radiation-hardened IA utilized TID monitoring and adaptive reference control to compensate for transistor parameter variations due to radiation effects. The radiation-hardened SAR ADC adopts delay-based double-feedback flip-flops to prevent soft errors which flips the data bits. Radiation-hardened IA and ADC were verified through compact model simulation, and fabricated CMOS chips were measured in radiation facilities to confirm their radiation tolerance.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.3
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• pp.327-339
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• 1986

In this paper, a hardware compiler for symbolic description language(SDL) is proposed for logic design automation. Lexical analysis is performed for SDL which describes the behavioral characteristics of a digital system at the register transfer level by the proposed algorithm I. The algorithm I is proposed to get the expressions for the control unit and for the data transfer unit. In order to obtain the network description language(NDL) expressions equivalent to gate-level logic circuits, another algorithm, the the algorithm II, is proposed. Syntax analysis for the data formed by the algorithm I is also Performed using circuit elements such as D Flip-Flop, 2-input AND, OR, and NOT gates. This SDL hardware compiler is implemented in the programming language C(VAX-11/750(UNIX)), and its efficiency is shown by experiments with logic design examples.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.1
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• pp.77-82
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• 2016

Recently, an IoT(Internet of Things) application communication protocol is standardizing for connectivity between every things on Internet. In this paper, we design and implement an indoor resource control service using IETF (Internet Engineering Task Force) CoAP (Constrained Application Protocol) based on Web. We present an indoor resource control architecture based on Web included functionalities of proxy and RD (Resource Directory) in a web server. Developed indoor resource control service supports to register low-powered and small-scale IoT nodes to web server using CoAP. This service allows users to control the indoor resources through a web browser using Web proxy with functionality of HTTP-CoAP converting.

• Journal of the Society of Naval Architects of Korea
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• v.55 no.6
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• pp.505-513
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• 2018

Main engine failures in ship operations can lead to a major damage in terms of the vessel itself and the financial cost. In this respect, monitoring of a vessel's main engine condition is crucial in ensuring the vessel's performance and reducing the maintenance cost. The collection of a huge amount of vessel operational data in the maritime industry has never been easier with the advent of advanced data collection technologies. Real-time monitoring of the condition of a vessel's main engine has a potential to create significant value in maritime industry. This study presents a case study on the establishment of upper control limit to detect vessel's main engine failures using multivariate control chart. The case study uses sample data of an ocean-going vessel operated by a major marine services company in Korea, collected in the period of 2016.05-2016.07. This study first reviews various main engine-related variables that are considered to affect the condition of the main engine, and then attempts to detect abnormalities and their patterns via multivariate control charts. This study is expected to help to enhance the vessel's availability and provide a basis for a condition-based maintenance that can support proactive management of vessel's main engine in the future.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.189-193
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• 2015

This paper provides the design techniques of a successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for distributed maximum power point tracking (DMPPT) control in a photovoltaic system. Both a top-plate sampling technique and a $V_{CM}$-based switching technique are applied to the 12b capacitor digital-to-analog converter (CDAC). With these techniques, we can implement a 12b SAR ADC with a 10b capacitor array digital-to-analog converter (DAC). To enhance the accuracy of the ADC, a single-to-differential converted DAC is exploited with the dual sampling technique during top-plate sampling. Simulation results show that the proposed ADC can achieve a signal-to-noise plus distortion ratio (SNDR) of 70.8dB, a spurious free dynamic range (SFDR) of 83.3dB and an effective number of bits (ENOB) of 11.5b with bipolar CMOS LDMOD (BCDMOS) $0.35{\mu}m$ technology. Total power consumption is 115uW under a supply voltage of 3.3V at a sampling frequency of 1.25MHz. And the figure of merit (FoM) is 32.68fJ/conversion-step.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.29 no.2
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• pp.193-199
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• 2011

It is necessary to register precisely Digital Elevation Model (DEM) generated from SPOT -5 stereo images in order to monitor the topographic and environmental changes of important topographic features such as Mt. Baekdu. The SPOT-5 DEM is registered taking SRTM DEM as a reference DEM. If SPOT-5 DEM is transformed with single 3D rigid equation, it has many errors. Therefore, this study extracted uniformly ground control points over study area and estimated locally adapted transformation equation. The accuracy of proposed method was evaluated with comparison to scale-based and GCP-based transformation method.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.1
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• pp.7-12
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• 2008

A GNSS(Global Navigation Satellite System) using GPS provides us with very useful information concerning the positioning of users in many sectors such as transportation, social services, the justice system and customs services, public works, search and rescue systems and leisure. A GNSS using the Galileo satellite is due to work in 2008 and expected to be used in various fields such as aviation, marine transportation, land surveying, resources development precise agriculture, telemetics, and so on. In this paper, we discuss the implementation and testing of a combined GPS/Galileo receiver which we named KSTAR V1.0. Each tracking module of GPS/Galileo dual mode correlator has the five track arms which consist of Very Early code, Early code, Prompt code, late code, and Very late code. Each of 24 tracking modules can be assigned to GPS and/or Galileo signal by changing mode selection register. The basic correlator integration dump period is set to 1ms for GPS C/A code and fast Galileo signal tracking. The performance of the developed combined GPS/Galileo receiver was tested and evaluated using the IF (Intermediated Frequency)-level GPS/Galileo signal generator.