• Journal of Welding and Joining
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• v.25 no.2
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• pp.76-81
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• 2007

Solder bumps have been used to interconnect the chip and substrate, and the size of the solder bump decreases below $100{\mu}m$ to accommodate higher packaging density. In order to fabricate solder bumps, a mold to chip transfer process is suggested in this work. Since the thin stainless steel mold is not wet by the solder, the molten solder is forced to fill the mold cavities with ultrasonic vibration. The solders within the mold cavities are transferred to the Cu pads on the polyimide film through reflow soldering.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.3
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• pp.59-63
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• 2010

Immersion Sn plating was produced on Cu foil by distributing nano-sized diamonds (ND). The ND distributed on the coating surface broke the continuity of Sn-oxide layer, therefore leading to penetrate the molten solder through the oxide and retarding the wettability degradation during a reflow process. Furthermore, the ND in the Sn coating played a role of diffusion barrier for Sn atoms and decreased the growth rate of intermetallic compound ($Cu_6Sn_5$) layer during the solid-state aging. The study confirmed the importance of ND to improve the wettability and reliability of the Sn plating. Complete dispersion of the ND within the immersion Sn plating needs to be further developed for the electronic packaging applications.

• Journal of Welding and Joining
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• v.20 no.5
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• pp.72-77
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• 2002

Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of microelectronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder b01p and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

• Journal of Welding and Joining
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• v.18 no.6
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• pp.74-82
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• 2000

The fluxless wetting properties of UBM-coated Si-wafer to the binary lead-free solders(Sn-Ag, Sn-Sb, Sjn-In, Sn0Bi) were estimated by wetting balance method. With the new wettability indices from the wetting curves of one side coated specimen, the wetting property estimation of UBM-coated Si-wafer was possible. For UBM of Si-chip, Au/Cu/Cr UBm was better than au/Ni/TI in the point of wetting time/ At general reflow process temperature, the wettability of high melting point solders(Sn-Sb, Sn-Ag) was better than that of low melting point one(Sn-Bi, Sn-In). The contact angle of the one side coated Si-plate to the solder could be calculated from the force balance equation by measuring the static state force and the tilt angle.

• Journal of the Korean institute of surface engineering
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• v.36 no.2
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• pp.168-175
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• 2003

The purpose of solder plating on chip external electrode is to provide a proper solderability to chips on PCB's. The quantitative or qualitative analysis of solderability has been performed by destructive methods, reflow or flow. Evidently, the solderability tends to depend on the grain structure which is varied with additives. Research on the feasibility of employing electrochemical techniques to characterize the solderability of electroplated tin - lead, with respect to the additives, was non destructively performed. The deposit morphology and the polarization behavior of electrolytes containing proprietary additives were evaluated to investigate the soldering degradation. The plated panels from synthetic electrolyte were analyzed according to % Sn, plating thickness, deposit appearance, grain structure, solderability and cyclic voltammetry.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.4
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• pp.1-9
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• 2011

Understanding the void characterization in the solder joints has become more important because of the application of lead free solder materials and its reliability in electronic packaging technology. According to the JEDEC 217 standard, it describes void types formed in the solder joints, and divides into some categories depending on the void position and formation cause. Based on the previous papers and the standards related to the void, reliability of the BGA solder joints is determined by the size of void, as well as the location of void inside the BGA solder ball. Prior to reflow soldering process, OSP(organic surface preservative) finished Cu electrode was exposed under $85^{\circ}C$/60%RH(relative humidity) for 168 h. Voids induced by the exposure of $85^{\circ}C$/60%RH became larger and bigger with increasing aging times. The void position has more influence on mechanical strength property than the amount of void growth does.

• Journal of Welding and Joining
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• v.30 no.5
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• pp.64-69
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• 2012

Sn-Bi eutectic alloy has been widely used as one of the key solder materials for step soldering at low temperature. The Sn-58Bi solder paste containing chloride flux was adopted to compare with that using the chloride-free flux. The paste was applied on the electroless nickel-immersion gold (ENIG) surface finish by stencil printing, and the reflow process was then performed at $170^{\circ}C$ for 10 min. After reflow, the solder joints were aged at $125^{\circ}C$ for 100, 200, 300, 500 and 1000 h in an oven. The interfacial microstructures were obtained by using scanning electron microscopy (SEM), and the composition of intermetallic compounds (IMCs) was analyzed using energy dispersive spectrometer (EDS). Two different IMC layers, consisting of $Ni_3Sn_4$ and relatively very thin Sn-Bi-Ni-Au were formed at the solder/surface finish interface, and their thickness increased with increasing aging time. The wettability of solder joints was investigated by wetting balance test. The mechanical property of each aging solder joint was evaluated by the ball shear test in accordance with JEDEC standard (JESD22-B117A). The results show that the highest shear force was measured when the aging time was 100 h, and the fracture mode changed from ductile fracture to brittle fracture with increasing aging time. On the other hand, the chloride flux in the solder paste did not affect the shear force and fracture mode of the solder joints.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.4
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• pp.1-10
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• 2001

Chip-on-glass(COG) mounting of area array electronic packages was attempted by heating the rear surface of a contact pad film deposited on a glass substrate. The pads consisted of an adhesion (i.e. Cr or Ti) and a top coating layer(i.e. Ni or Cu) were healed by the UV laser beam transmitted through the glass substrate. The lather energy absorbed on the pad raised the temperature of a solder ball which is in physical contact with the pad, and formed a reflowed solder bump. The effects of the adhesion and top coating layer on the laser reflow soldering were studied by measuring temperature profile of the ball during the laser heating process. The results were discussed based on the measurement of reflectivity of the adhesion layer. In addition, the microstructures of solder bumps and their mechanical properties were examined.

• Korean Journal of Materials Research
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• v.17 no.3
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• pp.152-159
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• 2007

When the electronics are tested with thermal shock for Pb-free solder joint reliability, there are temperature conditions with use environment but number of cycles for test don't clearly exist. To obtain the long term reliability data, electronic companies have spent the cost and times. Therefore this studies show the test method and number of thermal shock cycles for evaluating the solder joint reliability of electronic components and also research bonding strength variation with formation and growth of intermetallic compounds (IMC). SMD (surface mount device) 3216 chip resistor and 44 pin QFP (quad flat package) was utilized for experiments and each components were soldered with Sn-40Pb and Sn-3.0 Ag-0.5 Cu solder on the FR-4 PCB(printed circuit board) using by reflow soldering process. To reliability evaluation, thermal shock test was conducted between $-40^{\circ}C\;and\;+125^{\circ}C$ for 2,000 cycles, 10 minute dwell time, respectively. Also we analyzed the IMCs of solder joint using by SEM and EDX. To compare with bonding strength, resistor and QFP were tested shear strength and $45^{\circ}$ lead pull strength, respectively. From these results, optimized number of cycles was proposed with variation of bonding strength under thermal shock.

• Korean Journal of Metals and Materials
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• v.48 no.11
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• pp.1035-1040
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• 2010

The research efforts on GaN-based light-emitting diodes (LEDs) keep increasing due to their significant impact on the illumination industry. Surface mount technology (SMT) is widely used to mount the LED packages for practical application. In surface mount soldering both the device body and leads are intentionally heated by a reflow process. We studied on the effects of multiple reflows on microstructural variation and joint strength of the solder joints between the LED package and the substrate. In this study, Pb-free Sn-3.0Ag-0.5Cu solder and a finished pad with organic solderability preservatives (OSP) were employed. A $Cu_6Sn_5$ intermetallic compound (IMC) layer was formed during the multiple reflows, and the thickness of the IMC layerincreased with an increasing number of reflows. The shear force decreased after three reflows. From the observation of the fracture surface after a shear test, partially brittle fractures were observed after five reflows.