• 전력전자학회논문지
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• 제22권6호
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• pp.476-483
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• 2017

In this paper, a voltage-based model predictive control (MPC) scheme for a modular multilevel converter is used to reduce switching loss. The proposed method calculates an offset voltage that clamps the switching operation of submodules in which the current greatly flows at every sampling period by using the reference phase voltage and the reference phase current. To use the offset voltage, the proposed method converts the current-based MPC to the voltage-based MPC. The proposed voltage-based MPC then generates a new reference pole voltage that clamps the switching of submodules by applying the calculated offset voltage to the phase voltage. Therefore, the proposed method can reduce the switching loss by stopping the switching operation of submodules in which the current greatly flows. The switching loss reduction effect of the proposed method is verified by comparing its loss data with those of the conventional MPC method.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 정기총회 및 추계학술대회 논문집 학회본부
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• pp.91-93
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• 1993

This paper introduced an advanced PWM method to drive a variable speed AC motor. With this technique, a switching pattern is determined to minimize the error between a reference signal and feedback signal. In addition to its simplicity of implementation, the proposed technique has the advantage of control led constant voltage per frequency operation.

• 한국전자거래학회지
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• 제4권3호
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• pp.139-158
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• 1999

In this paper we present the development of CITIS(Contractor Integrated Technical Information Service) reference model system which can be utilized for electronic commerce among enterprises. For the physical analysis target model, we selected switching system businesses of Korea Telecom. From analysis of life-cycle business process and data, we derived CITIS reference model containing CITIS To-Be model and CITIS scenario. Derived CITIS reference model is generalized so that it can be used not only for switching system businesses but other business areas regarding CITIS implementation. On the base of the derived CITIS reference model, We also developed CITIS information management system and CITIS-support workflow system as CITIS reference model system. Developed CITIS reference model system supports information and business process sharing among enterprises on internet and it does make a contribution to expansion of CITIS which is moving from conceptual research towards real implementation phase.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권12호
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• pp.777-784
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• 1999

Since the ultra-high voltage power apparatus are recommended to withstand switching surge generated from the electric power system, the switching impulse voltage is generally used to verify this requirement at the testing laboratories. Recently, the international standard(IEC 60060-2) related to the high voltage measurement techniques is revised requiring a traceability of measuring system for high voltage measurements. In this paper, a reference divider for switching impulse voltage is developed satisfying the revised. IEC standard and the possibility of applications has been investigated. Therefore, the characteristics of the high and low voltage side resistor and the shielding ring have been analyzed including the step response characteristics of the prototype divider. Throughout various efforts, it is confirmed that our measuring device has shown compatible characteristics as a reference divider.

• 전기학회논문지
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• 제61권11호
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• pp.1606-1610
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• 2012

Hysteresis current regulator has been used widely because of its simple principle and structure. However, when the current band width is too narrow or the applied voltage is relatively too high, the switching frequency may increase abruptly and it generates a large amount of heat. Thus, this study will suggest a better and simple method to reduce the switching frequency. For single phase current control, the proposed hysteresis current control is executed by adding 0 mode state and comparing the slope of the current reference. This simple method decreases the generated switching frequency and significantly reduces the generated heat. This proposed method was proved with simulations and experiments comparing with the classical hysteresis current control method.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제55권1호
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• pp.9-15
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• 2006

The conventional hysterysis band DTC(Direct Torque Control) strategy have relatively high torque ripple at low speed and variable switching frequency according to motor speed even though it provides a fast torque response with very simple scheme consisted with only two hysteresis band comparators and a switching table for torque and flux control. In this paper, author proposed a new DTC scheme based on the torque slope and reference voltage control. The new scheme can maintain the minimized torque ripple and constant switching frequency. Experimental tests carried out with an 1.5kW induction motor drive system show improved dynamic characteristics and prove the feasibility of proposed strategy.

• 한국산학기술학회논문지
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• 제19권2호
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• pp.639-643
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• 2018

전자 시스템이 소형화, 이동성의 요구에 따라 전력 변환의 필요성이 계속 증가하고 있다. 또한 전력 변환에는 전력 효율과 함께 전력 변환시스템의 소형화를 위해 적용하는 스위칭에 의한 잡음으로부터 시스템 안정성이 보장되어야 한다. 따라서 전력 변환시 스위칭 잡음을 감소시킬 수 있는 대책이 필수적이다. 본 논문에서는 DC/DC Buck Converter회로를 구성하였고, reference plane을 갖는 4층 PCB 회로 구조에서 부품의 배치를 변경할 경우 발생하는 스위칭 잡음특성을 비교 분석하였다. 또한, Reference Plane을 제거한 양면 PCB회로 구조에서 부품 배치를 달리하였을 경우 스위칭 잡음 특성을 각각 시뮬레이션으로 비교 분석하였다. 그 결과 4층 PCB회로 구조에서는 Current return path에 따라 Radiated Emission 특성이 12dB, Conducted Emission 특성이 7~8dB 감소됨을 확인하였다. 또한 양면 PCB회로 구조에서는 Conducted Emission이 20~25dB 감소됨을 확인하였다. 이로써 전력 변환 회로를 설계할 경우 Current return path의 구성에 따라 잡음 특성을 향상시킬 수 있음을 확인하였다.

• 조명전기설비학회논문지
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• 제23권1호
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• pp.150-155
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• 2009

히스테리시스 전류 제어방식은 원리와 구조가 간단하여 널리 사용되었으나, 전류 오차 허용 밴드폭이 너무 작거나, 전원 전압이 상대적으로 너무 큰 경우 등에는 스위칭 주파수가 급격히 증가하여 많은 열을 발생할 수 있는 등의 단점이 있었다. 이에 본 연구에서는 단상 전류제어에서 0 모드를 추가하고, 기준 전류의 기울기를 비교하여 히스테리시스 전류 제어를 수행함으로써 대폭적인 스위칭 주파수 감소와 안정적인 전류제어가 가능하게 하였다. 또한 이를 컴퓨터 시뮬레이션을 통해 그 타당성을 확인하였다.

• Journal of Power Electronics
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• 제18권4호
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• pp.1027-1036
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• 2018

In this paper a new generalized space vector pulse width modulation scheme is proposed based on the principle of reverse mapping to drive the switches of multilevel inverters. This projected scheme is developed based on the middle vector of the subhexagon which holds the tip of the reference vector, which plays a major role in mapping the reference vector. A new approach is offered to produce middle vector of the subhexagon which holds tip of the reference vector in the multilevel space vector plane. By using middle vector of the subhexagon, reference vector is linked towards the inner two level sub-hexagon. Then switching vectors, switching sequence and dwell times corresponding to a particular sector of a two-level inverter are determined. After that, by using the two level stage findings, the switching vectors related to exact position of the reference vector are directly generated based on principle of the reverse mapping approach and do not need to be found at n level stage. In the reverse mapping principle, the middle vector of subhexagon is added to the formerly found two level switching vectors. The proposed generalized algorithm is efficient and it can be applied to an inverter of any level. In this paper, the proposed scheme is explained for a five-level inverter and the performance is analyzed for five level and three level inverters through MATLAB. The simulation results are validated by implementing the propose scheme on a V/f controlled three-level inverter fed induction motor using dSPACE control desk.

• 전자공학회논문지SC
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• 제39권4호
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• pp.25-35
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• 2002

본 논문에서는 단일 폴리 공정을 기반으로 하여 8b 해상도로 200MHz의 고속 동작을 하기 위해 최적화된 시간 공유 서브레인징 ADC(Analog-to-Digital Converter)를 제안한다. 제안하는 ADC는 높은 정확도를 요구하는 하위 ADC에 이중 채널 구조를 적용하여 높은 샘플링 주파수를 보장하였고, 새로운 기준 전압 인가 방식을 적용하여 기준 전압의 빠른 정착 시간을 얻으면서 동시에 칩 면적을 크게 감소시켰다. 기준 전압을 생성하는 저항열에서는 선형성 및 속도 향상을 위해 기존의 인터메쉬드 구조를 보완한 새로운 저항열을 사용하였다. 8 비트 수준의 정밀도에서 면적 및 전력 소모를 최소화하기 위해 공통 드레인(common- drain) 증폭기 구조를 사용하여 샘플-앤-홀드 증폭기(Sample-and-Hold Amplifier：SHA)를 설계하였으며, 입력단에 스위치와 캐패시터로 구성된 동적 공통 모드 궤환 회로(Dynamic Common Mode Feedback Circuit)를 사용하여 SHA의 동적 동작 범위(dynamic range)를 증가시켰다. 동시에 상위 ADC와 하위 ADC간의 신호 처리를 단순화시키기 위해 상위 ADC에 새로운 인코딩 회로를 제안하였다.