• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.8
• /
• pp.18-24
• /
• 2011

A new problem happens with the evolution of TSV based 3D IC design. The bonding process takes place which follows with the testing of design for proper connectivity in the absence of TSV redundancy. In order to achieve good yield, the design should be tested with redundancy TSV. This paper presents a wrapper cell design for redundancy TSV interconnect test. The design for test technique, in terms of hardware and software perspectives is described. The wrapper cell with hardware design can use original test patterns. However, software design has less area overhead.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.4
• /
• pp.138-144
• /
• 1989

In this paper, a new method is proposed to remove the logical redundancy for the gate-level circuit optimization. In this method, only the fanout-branch signals in the circuits, not all the signals, are examined for redundancy. When a signal is determined to be nonredundant, other nonredundant signals are found out by the efficient procedure, using only the informations which are generated in the course of the redundancy-check. In order to avoid the re-examination of a signal for redudancy, a heuristic method is proposed to determine the redundancy-checking order of signals. The proposed method is heuristic, based on the VLSI test theory. It is much faster than other methods, since it does not reexamine a signal for redundancy.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.3
• /
• pp.131-136
• /
• 1990

In this paper, new methods are proposed which speed up the logical redundancy identification for the gate-level logic optimization. Redundancy indentification, as well as deterministic test pattern generation, can be viewed as a finite space search problem, of which execution time depends on the size of the search space. For the purpose of efficient search, we propose dynamic head line and mandatory assignment. Dynamic head lines are changed dynamically in the process of the redundancy identification. Mandatory assignement can avoid unnecessary assignment. They can reduce the search size efficiently. Especially they can be used even though the circuit is modified in the optimization procedure, that is different from the test pattern generation methods. Some experimental results are presented indicating that the proposed methods are faster than existing methods.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.10
• /
• pp.75-80
• /
• 2009

In order to prevent loss of communication packets and drop of transmission speed owing to the network fault occurrence, it should be considered network redundancy. That is why a messages of IED GOOSE is the critical signal in charge of protection and control of the substation. So most of users implement the substation automation system with Hybrid network topology ant IED supporting double ethernet ports. Because IEC 61850 GOOSE conformance test is limited in the functional test, this paper suggests how to test the performance of IED GOOSE transmission considering Network redundancy, and describes the analysis of an example test on real IEDs and how to impact the IED GOOSE performance to the substation automation system.

• Journal of Advanced Technology Convergence
• /
• v.2 no.3
• /
• pp.9-15
• /
• 2023

Recently, various public services are being performed based on information systems as the informatization business spreads. Public administration services based on these information systems provide internal and external services. In recent years, as the construction of cloud-based public services has been expanded, the advancement of information systems has attracted attention. In particular, as the dependence on information systems increases, the establishment of a response system to prevent dangerous situations such as interruption and paralysis of information systems in advance has become a hot topic not only in companies but also in public institutions. Therefore, in this paper, a disaster recovery system was designed and built to maximize the efficiency of system operation and shorten recovery time through service conversion automation of the disaster recovery system. The integrated DR server redundancy test, web server redundancy test, FC-IP redundancy test, and SAN switch redundancy test were performed respectively by applying the disaster recovery system designed and built according to the method proposed in the paper.

• Journal of Advanced Marine Engineering and Technology
• /
• v.38 no.8
• /
• pp.1004-1009
• /
• 2014

The redundancy allocation problem has usually considered only the component redundancy at the lowest-level for the enhancement of system reliability. A system can be functionally decomposed into system, module, and component levels. Modular redundancy can be more effective than component redundancy at the lowest-level because in modular systems, duplicating a module composed of several components can be easier, and requires less time and skill. We consider a multi-level redundancy allocation problem in which all cases of redundancy for system, module, and component levels are considered. A tabu search of memory-based mechanisms that balances intensification with diversification via the short-term and long-term memory is proposed for its solution. To the best of our knowledge, this is the first attempt to use a tabu search for this problem. Our tabu search algorithm is compared with the previous genetic algorithm for the problem on the new composed test problems as well as the benchmark problems from the literature. Computational results show that the proposed method outstandingly outperforms the genetic algorithm for almost all test problems.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.12
• /
• pp.1022-1032
• /
• 2002

A multibit DRAM BIST methodology reducing redundancy programming overhead has been proposed. It is capable of counting and locating faulty bits simultaneously with the test. If DRAM cells are composed of n blocks generally, the proposed BIST can detect the state of no error, the location of faulty bit block if there is one error and the existence of errors in more than two blocks, which are n + 2 states totally, with only n comparators and an 3 state encoder. Based on the proposed BIST methodology, the testing scheme which can detect the number and locations of faulty bits with the errors in two or more blocks, can be easily implemented. Based on performance evaluation, the test and redundancy programming time of 64MEG DRAM with 8 blocks is reduced by 1/750 times with 0.115% circuit overhead.

• Proceedings of the Korean Society of Propulsion Engineers Conference
• /
• 2012.05a
• /
• pp.468-471
• /
• 2012

This paper describes a construction scheme of hot backup or triple modular redundancy control system in a ground hot-firing test facility to carry out performance assessment of propulsion system used in a space launch vehicle. It was possible for a hot backup redundancy control system with manual operated console to simulate TMR control system. A console layout of control system in control center to restrict imprudent works of operators was proposed.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.45 no.2
• /
• pp.133-139
• /
• 2017

Flight control computer of tiltrotor UAV was designed by redundancy system with primary and secondary channels to improve reliability. The redundancy functions consist of channel switching and data recovery. The channel switching function consists of software method by using cross channel data link and hardware method by using watchdog timer. The data recovery is the function to maintain flight condition when the flight control computer is restarted exceptionally in operation. The redundancy system was verified by flight control computer bench test, system integration test and HILS test. This paper describes the redundancy function of tiltrotor UAV flight control computer and test-verification method.

• Communications for Statistical Applications and Methods
• /
• v.13 no.2
• /
• pp.297-307
• /
• 2006

Most methods for describing the relationship among random variables require specific probability distributions and some assumptions of random variables. The mutual information based on the entropy to measure the dependency among random variables does not need any specific assumptions. And the redundancy which is a analogous version of the mutual information was also proposed. In this paper, the redundancy and mutual information are explored to multi-dimensional categorical data. It is found that the redundancy for categorical data could be expressed as the function of the generalized likelihood ratio statistic under several kinds of independent log-linear models, so that the redundancy could also be used to analyze contingency tables. Whereas the generalized likelihood ratio statistic to test the goodness-of-fit of the log-linear models is sensitive to the sample size, the redundancy for categorical data does not depend on sample size but its cell probabilities itself.