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Wrapper Cell Design for Redundancy TSV Interconnect Test  

Kim, Hwa-Young (HUMAX)
Oh, Jung-Sub (Department of Computer Science & Engineering, Hanyang University)
Park, Sung-Ju (Department of Computer Science & Engineering, Hanyang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.48, no.8, 2011 , pp. 18-24 More about this Journal
Abstract
A new problem happens with the evolution of TSV based 3D IC design. The bonding process takes place which follows with the testing of design for proper connectivity in the absence of TSV redundancy. In order to achieve good yield, the design should be tested with redundancy TSV. This paper presents a wrapper cell design for redundancy TSV interconnect test. The design for test technique, in terms of hardware and software perspectives is described. The wrapper cell with hardware design can use original test patterns. However, software design has less area overhead.
Keywords
TSV interconnect test; redundancy TSV; design-for-testability; boundary scan design;
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