• Title/Summary/Keyword: Rectifier Circuit

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A Study on the ZVT PFC for Using 3[KW] Power Amplifier (Power Amp.용 3KW급 ZVT PFC 개발)

  • Lee, S.R.;Jeong, C.G.;Kim, S.W.;Ko, S.H.
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1306-1308
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    • 2000
  • A new ZVT PFC for using 3[KW] power amplifier is proposed. Generally, the single phase diode rectifier has been widely used in the SMPS of the conventional power amplifier. But this rectifier has occurred some problems which are the input power factor and current harmonics. To solve the above problems, in this paper, two topology is adopted. The one is the boost type PFC for improving the input power factor. The other is the ZVT resonant circuit for reducing the switching loss and stress. In this paper, the proposed topology is analyze designed to built the ZVT PFC for using 3[KW] power amplifier. In order to verify the circuit va finally, the PSPICE simulation and experiment results are presented.

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A Test Circuit for Characterization and Modelling of the Reverse Recovery Power High-Speed Rectifier (SiC SBD의 역회복 특성 분석을 위한 $T_{rr}$ 측정회로의 검토)

  • Seo, Kil-Soo;Kim, Hyeng-Woo;Kim, Snag-Chul;Bahng, Wook;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.373-376
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    • 2004
  • 전력전자 회로의 고속화에 따라 정류기의 역할은 점차 중요해지고 있다. 전원장치의 compact화 및 초소형화에 따라 스위칭 주파수는 높아지고 있다. 최근 전원장치의 on-line 뿐만 아니라 off-line에서의 효율을 향상시키려면 도통손실 및 스위칭 손실을 최소화를 요구받고 있다. 스위칭 주파수가 증가함에 따라 power rectifier는 도전 및 스위칭 손실의 최소화를 위해서는 스위칭 손실의 주된 원인인 역회복 특성을 잘 파악해야 한다. 이를 위해 본 고에서는 최근 제작된 SiC SBD의 역회복 특성을 분석을 위한 $t_{rr}$, 측정을 위한 $t_{rr}$ Tester를 MIL-STD-750-4031.4에 참고하여 제작하였으며, 제작된 $t_{rr}$ Tester를 이용하여 SiC SBD의 $t_{rr}$의 측정결과에 대해 기술하였다.

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Boost Type PFC Rectifier with Active Power Decoupling Circuit with Repetitive Controller (반복제어기를 적용한 Active Power Decoupling 회로를 갖는 Boost Type PFC 정류기)

  • Hwang, Duck-Hwan;Lee, Jungyong;Cho, Younghoon;Choe, Gyu-Ha
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.6
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    • pp.389-396
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    • 2018
  • This study proposes a control method using a repetitive controller for a boost-type PFC rectifier with an APD circuit structure to improve the current distortion caused by DCM condition. Conventional proportional integral controllers have bandwidth limitations in DCM conditions. The performance improvement of the APD controller in the DCM region is verified through simulations and experiments on the compensation of harmonics by the repetitive controller.

Design and Analysis of a NMOS Gate Cross-connected Current-mirror Type Bridge Rectifier for UHF RFID Applications (UHF RFID 응용을 위한 NMOS 게이트 교차연결 전류미러형 브리지 정류기의 설계 및 해석)

  • Park, Kwang-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.10-15
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    • 2008
  • In this paper, a new NMOS gate cross-connected current-mirror type bridge rectifier for UHF RFID applications is presented. The DC converting characteristics of the proposed rectifier are analyzed with the high frequency equivalent circuit and the gate capacitance reduction technique for reducing the gate leakage current due to the increasing of operating frequency is also proposed theoretically by circuitry method. As the results, the proposed rectifier shows nearly same DC output voltages as the existing NMOS gate cross-connected rectifier, but it shows the gate leakage current reduced to less than 1/4 and the power consumption reduced more than 30% at the load resistor, and it shows more stable DC supply voltages for the valiance of load resistance. In addition, the proposed rectifier shows high enough and well-rectified DC voltages for the frequency range of 13.56MHz HF(for ISO 18000-3), 915MHz UHF(for ISO 18000-6), and 2.45 GHz microwave(for ISO 18000-4). Therefore, the proposed rectifier can be used as a general purpose one to drive RFID transponder chips on various RFID systems which use specified frequencies.

A New Valley-fill Circuit for Improving Power Factor (밸리-필 정류 회로의 역률 개선)

  • 최남열;안찬권;이치환
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2935-2938
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    • 2003
  • A new Valley-fill circuit for improving PF(power factor) is proposed in this paper. The proposed topology combines Valley-fill rectifier and an additional inductor for boosting. In the proposed circuit, a shapc of input current is related to the PWM duty cycle. The boosting inductor makes improve PF by the electric charge transfer action. The operation principle and the shape of input current arc analyzed as applied the boosting inductor. The optimum value of boosting inductor is determined. A 100W single-stage converter has been designed and tested. Experimental results are presented to verify the validity of the proposed converter.

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Characteristics Analysis of Two-Transistor Forward Converter using PFC and Lossless Snubber Circuit (PFC와 무손실 스너버를 이용한 Two-Transistor Forward Converter의 특성해석)

  • Bae, Jin-Yong;Kim, Yong;Baek, Su-Hyeon
    • Proceedings of the KIEE Conference
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    • 2005.04a
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    • pp.176-179
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    • 2005
  • This paper proposed the two-transistor forward circuit using PFC, lossless snubber and synchronous rectifier for low voltage and high current output. The principle of operation, feature and design considerations is illustrated and verified through the experiment with a 200W(5V, 40A) 100kHz MOSFET based experimental circuit.

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A Study on the Electrical Characteristic of SCR-based Dual-Directional ESD Protection Circuit According to Change of Design Parameters (SCR 기반 양방향성 ESD보호회로의 설계 변수 변화에 따른 전기적 특성의 관한 연구)

  • Kim, Hyun-Young;Lee, Chung-Kwang;Nam, Jong-Ho;Kwak, Jae-Chang;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.19 no.2
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    • pp.265-270
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    • 2015
  • In this paper, we proposed a dual-directional SCR (silicon-controlled rectifier) based ESD (electrostatic discharge) protection circuit. In comparison with conventional SCR, this ESD protection circuit can provide an effective protection against ESD pulses in the two opposite directions, so the ESD protection circuit can be discharged in two opposite direction. The proposed circuit has a higher holding voltage characteristic than conventional SCR. These characteristic enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. it was analyzed to figure out electrical characteristics in term of individual design parameters. They are investigated by using the Synopsys TCAD simulator. In the simulation results, it has trigger voltage of 6.5V and holding voltage increased with different design parameters. The holding voltage of the proposed circuit changes from 2.1V to 6.3V and the proposed circuit has symmetrical I-V characteristic for positive and negative ESD pulse.

Design of An Electronic Starter Using PSpice Simulation (PSpice 시뮬레이션을 이용한 전자식 스타터의 설계)

  • 이동호;곽재영;여인선;정영춘
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 1997.10a
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    • pp.11-13
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    • 1997
  • Abstract - An electronic starter using MOSFET has been designed to take advantage of ideal preheating and starting features which can extend the lifetime of fluorescent lamps. The preheating circuit of the developed electronic starter is consisted of four parts - afull-wave rectifier circuit, an FET switching circuit a timer circuit for the gate switching, and a circuit for end-of-life protection. The circuit is analyzed by using PSpice simulation, and is improved to give an appropriate starting-time through control of R-C time constant of the timer circuit. And the circuit is also provided with an end-of-life protection feature, which utilizes the negative resistance characteristics of a thermistor that is thermally linked to FET through a heatsink. This also protects the FET from any overheating problems. From the results of simulation it is possible to obtain an appropriate value on the starting time for proper ignition and also it is verified that the limit for resistance of the thermistor is dependant on the value of resistance is the timer circuit

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Multi-Band RF Energy Harvesting System Using Buck-Boost DC-DC Converter (Buck-Boost DC-DC Converter를 이용한 다중 대역 RF 에너지 수집 시스템)

  • Cho, Choon Sik
    • Journal of Satellite, Information and Communications
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    • v.12 no.2
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    • pp.89-93
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    • 2017
  • This paper introduces an energy harvesting system that generates energy by collecting multi-band RF signals using buck-boost DC-DC converter. In an environment where the resistance of load using the collected electric energy is constantly changing, a buck-boost DC-DC converter is used in which the input resistance of the DC-DC converter does not change even if the load resistance changes. Since the frequency band of the input RF signal varies, the rectifier is designed for each band so that multiple bands can be processed, and a matching circuit is added to each band in front of the rectifier. For a rectifier to collect very small RF signals, a circuit is designed so that a constant voltage is obtained according to a very small input signal by devising a method of continuously accumulating the voltages collected and generated in each band. It is confirmed that the output efficiency can reach up to 20% even for the RF signal having the input of -20 dBm.

Soft Switching Control Method for Photovoltaic AC Module Flyback Inverter using Synchronous Rectifier (동기 정류기를 이용한 태양광 모듈용 플라이백 인버터 소프트 스위칭 제어 기법)

  • Jang, Jin-Woo;Kim, Young-Ho;Choi, Bong-Yeon;Jung, Yong-Chae;Won, Chung-Yuen
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.4
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    • pp.312-321
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    • 2013
  • In this paper, high efficiency control method for flyback inverter with synchronous rectifier(SR) based on photovoltaic AC modules is proposed. In this control method, the operation of SR is classified according to the voltage spike across main switch SP. When the voltage spike across SP is lower than the rating voltage of SP, the operation of active clamp circuit is interrupted for reducing the switching loss of auxiliary switch. In this time, the SR is operated for soft-switching of SP. When the voltage spike across Sp is higher than the rating voltage of SP, the operation of active circuit is activated for reducing the voltage spike. The SR is operated for reducing the conduction loss of secondary output diode. Thus, a switching loss of the main switch can be reduced in low power region, and weighted-efficiency can be improved. A theoretical analysis and the design principle of the proposed method are provided. And validity is confirmed through simulation and experimental results.