• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.3
• /
• pp.278-285
• /
• 2012

A digital readout IC for capacitive sensors is presented. Digital capacitance readout circuits suffer from static capacitance of sensors, especially single-ended sensors, and require large passive elements to cancel such DC offset signal. For this reason, to maximize a dynamic range with a small die area, the proposed circuit features digital filters having a coarse and fine compensation steps. Moreover, by employing switched-capacitor circuit for the front-end, correlated double sampling (CDS) technique can be adopted to minimize low-frequency device noise. The proposed circuit targeted 8-kHz signal bandwidth and oversampling ratio (OSR) of 64, thus a $3^{rd}$-order ${\Delta}{\Sigma}$ modulator operating at 1 MH was used for pulse-density-modulated (PDM) output. The proposed IC was designed in a 0.18-${\mu}m$ CMOS mixed-mode process, and occupied $0.86{\times}1.33mm^2$. The measurement results shows suppressed DC power under about -30 dBFS with minimized device flicker noise.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.3
• /
• pp.503-510
• /
• 2006

Readout circuit is to convert signal occurred in a defector into suitable signal for image signal processing. In general, it has to possess functions of impedance matching with perception element, amplification, noise reduction and cell selection. It also should satisfies conditions of low-power, low-noise, linearity, uniformity, dynamic range, excellent frequency-response characteristic, and so on. The technical issues in developing image processing equipment for focal plane way (FPA) can be categorized as follow: First, ultraviolet (UV) my detector material and fine processing technology. Second, ReadOut IC (ROIC) design technology to process electric signal from detector. Last, package technology for hybrid bonding between detector and ROIC. ROIC enables intelligence and multi-function of image equipment. It is a core component for high value added commercialization ultimately. Especially, in development of high-resolution image equipment ROIC, it is necessary that high-integrated and low-power circuit design technology satisfied with design specifications such as detector characteristic, signal dynamic range, readout rate, noise characteristic, ceil pitch, power consumption and so on. In this paper, we implemented a $8\times8$ FPA prototype ROIC for reduction of period and cost. We tested unit block and overall functions of designed $8\times8$ FPA ROIC. Also, we manufactured ROIC control and image boards, and then were able to verify operation of ROIC by confirming detected image from PC's monitor through UART(Universal Asynchronous Receiver Transmitter) communication.

• Journal of Semiconductor Engineering
• /
• v.1 no.3
• /
• pp.81-87
• /
• 2020

An instrumentation amplifier (IA) and an analog-to-digital converter (ADC) are essential circuit blocks for accurate and robust sensor readout systems. This paper introduces recent advances in radiation-hardening by design (RHBD) techniques applied for the sensor readout integrated circuits (IC), e.g., the three-op-amp IA and the successive-approximation register (SAR) ADC, operating against total ionizing dose (TID) and singe event effect (SEE) in harsh radiation environments. The radiation-hardened IA utilized TID monitoring and adaptive reference control to compensate for transistor parameter variations due to radiation effects. The radiation-hardened SAR ADC adopts delay-based double-feedback flip-flops to prevent soft errors which flips the data bits. Radiation-hardened IA and ADC were verified through compact model simulation, and fabricated CMOS chips were measured in radiation facilities to confirm their radiation tolerance.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.39C no.1
• /
• pp.82-89
• /
• 2014

Recently, inertial sensors are popularly used for the location and position recognition of small devices for M2M/IoT. In this paper, we designed low power, low noise, small sized 6-axis inertial sensor IC for mobile applications, which uses a 3-axis piezo-electric gyroscope sensor and a 3-axis piezo-resistive accelerometer sensor. Proposed IC is composed of 3-axis gyroscope readout circuit, two gyroscope sensor driving circuits, 3-axis accelerometer readout circuit, 16bit sigma-delta ADC, digital filter and control circuit and memory. TSMC $0.18{\mu}m$ mixed signal CMOS process was used. Proposed IC reduces 27% of the current consumption of LSM330.

• Electrical & Electronic Materials
• /
• v.15 no.10
• /
• pp.3-6
• /
• 2002

• Journal of Electrical Engineering and Technology
• /
• v.7 no.2
• /
• pp.221-224
• /
• 2012

We propose a Readout Integrated Circuit (ROIC), which applies a fixed current bias sensing method to the input stage in order to simplify the circuit structure and the infrared sensor characteristic control. For the sample-and-hold stage to display and control a signal detected by the infrared sensor using a two-dimensional (2D) focal plane array, a differential delta sampling (DDS) circuit is proposed, which effectively removes the FPN. In addition, the output characteristic is improved to have wider bandwidth and higher gain by applying a two-stage variable gain amplifier (VGA). The output characteristic of the proposed device was 23.91 mV/$^{\circ}C$, and the linearity error rate was less than 0.22%. After checking the performance of the ROIC using HSPICE simulation, the chip was manufactured and measured using the SMIC 0.35 um standard CMOS process to confirm that the simulation results from the actual design are in good agreement with the measurement results.

• Journal of Sensor Science and Technology
• /
• v.28 no.1
• /
• pp.1-6
• /
• 2019

This paper presents an air flow sensor (AFS) based on a polymer thin film. This AFS primarily consists of a polymer membrane attached to a metal-patterned glass substrate and a temperature-sensing element composed of NiCr. These two components were integrated on a single glass substrate. The AFS measures changes in capacitance caused by deformation of the polymer membrane based on the air flow and simultaneously detects the temperature of the surrounding environment. A readout integrated circuit (ROIC) was also fabricated for signal processing, and an ROIC chip, 1.8 mm by 1.9 mm in size, was packaged with an AFS in the form of a system-in-package module. The total size of the AFS is 1 by 1 cm, and the diameter and thickness of the circular-shaped polymer membrane are 4 mm and $15{\mu}m$, respectively. The rate of change of the capacitance is approximately 11.2% for air flows ranging between 0 and 40 m/s.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.07a
• /
• pp.23-25
• /
• 2005

Infrared bolometer sensor's variation is detected by voltage drop between reference resistor and bolometer resistor in this architecture. One of the serious problems in this architecture is that these resistors value has a process variation. So common-mode level could be different from expectation in room temperature. Different common-mode level could lead to wrong output at the end of readout circuit. We suggest useful method to solve this problem. Difference correction using capacitor has reduced CM level difference to 86% for 1 $M\Omega$. bolometer and reference resistor's 10% variation.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.5
• /
• pp.27-37
• /
• 1999

A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

• Transactions on Electrical and Electronic Materials
• /
• v.8 no.5
• /
• pp.196-200
• /
• 2007

In this paper, we propose and discuss the design using a simple method that reduces the fixed pattern noise(FPN) generated on the amorphous Si($\alpha-Si$) bolometer. This method is applicable to an IR image sensor. This method can also minimize the size of the reference resistor in the readout integrated circuit(ROIC) which processes the signal of an IR image sensor. By connecting four bolometer cells in parallel and averaging the resistances of the bolometer cells, the fixed pattern noise generated in the bolometer cell due to process variations is remarkably reduced. Moreover an $\alpha-Si$ bolometer cell, which is made by a MEMS process, has a large resistance value to guarantee an accurate resistance value. This makes the reference resistor be large. In the proposed cell structure, because the bolometer cells connected in parallel have a quarter of the original bolometer's resistance, a reference resistor, which is made by poly-Si in a CMOS process chip, is implemented to be the size of a quarter. We designed a ROIC with the proposed cell structure and implemented the circuit using a 0.35 um CMOS process.