• Journal of Satellite, Information and Communications
• /
• v.12 no.2
• /
• pp.1-10
• /
• 2017

In this paper we propose three existing reflection removal algorithms and one proposed algorithm to estimate accurate targets in near field using IR-UWB (Impulse-Radio Ultra Wideband) radar. The received signal includes unnecessary reflected wave signals to the target signal. A reflective cancellation algorithm was used to remove unnecessary signals and estimate only the correct target signal. The location of the targets is estimated in real time with one transmitting antenna and one receiving antenna. In order to overcome the disadvantages of the existing three reflection removal algorithms, we propose a new reflection removal algorithm and estimate the most accurate target. Also we used DSP(Digital Signal Processor) to install the external mounting of vehicles. This paper will contribute to the study of the future reflections.

• Journal of IKEEE
• /
• v.8 no.1 s.14
• /
• pp.39-46
• /
• 2004

This paper presents the realization schemes for a multipurpose coherent mono-pulse radar Simulator with extendable features. We developed and installed the TSG(Timing Signal Generator) board which can simulate a mechanically rotate signal of antenna, an operation timing signal of pulse radar and target signal, to operate the simulator without real target in the indoor environment. Also, with the insertion of the radar signal processor, it came to be easy to achieve the addition of radar function algorithms, to rebuild or extend the multi-DSP Architecture into the simulator. Throughout the simulation results, we verified that the designed coherent mono-pulse radar simulator can exactly display a moving target on the realistic monitor(RD 9800).

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.40 no.3
• /
• pp.93-98
• /
• 2003

With the improvement of digital signal processors, digital pulse compressor(DPC) is widely used in radar systems. The DPC can be implemented by using FIR filter algorithm in time domain or FFT algorithm in frequency domain. This paper designs an expansible DPC using multiple DSPs. With ADSP-21060 of Analog Devices Inc., the computation time as a function of the number of received range cells and FIR filter tap is compared and analyzed in time domain using C-language and assembly language. therefore, when radar system parameters are determined, the number of DSP's required to implement DPC can be easily estimated.

• Journal of Advanced Navigation Technology
• /
• v.21 no.6
• /
• pp.554-560
• /
• 2017

Accurate altimetry is required for the reliable flight control of drones or unmanned air vehicles (UAVs), and the radar altimeter is commonly used owing to its accuracy for the ground level. Due to the limitation for size, weight and power consumption, the frequency modulated continuous wave (FMCW) radar is appropriate for drone because it has lower complexity than that of pulse Doppler (PD) radar. Especially, fast-ramp FMCW radar, which transmits linear FM signal during very short period, is generally utilized, because it is robust for the ego-motion of drone. Therefore, we present the design and implementation results of the radar signal processor (RSP) for fast-ramp FMCW radar system. The proposed RSP was designed with Verilog-HDL and implemented with Altera Cyclone-IV FPGA device. Implementation results show that the proposed RSP includes 27,523 logic elements, 15,798 registers and memory of 138Kbits and can measure the altimeter at the rate of 100Hz with the operating frequency of 50MHz.

• Journal of Advanced Navigation Technology
• /
• v.10 no.2
• /
• pp.173-180
• /
• 2006

An airborne radar is an essential aviation electronic system of the aircraft to perform various missions in all weather environments. This paper presents the design, development, and test results of the multi-mode pulsed Doppler radar system test model for helicopter-borne flight test. This radar system consists of 4 LRU units, which include ANTU(Antenna Unit), TRU(Tx Rx Unit), RSDU(Radar Signal & Data Processing Unit) and DISU(Display Unit). The developed technologies include the TACCAR processor, planar array antenna, TWTA transmitter, coherent I/Q detector, digital pulse compression, DSP based Doppler FFT filtering, adaptive CFAR, IMU, and tracking capability. The design performance of the developed radar system is verified through various helicopter-borne field tests including MTD (Moving Target Detector) capability for the Doppler compensation due to the moving platform motion.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.19 no.10
• /
• pp.1957-1964
• /
• 1994

In this thesis, a Synthetic Aperture Rarar Processor that is possible real-time handling is implemented using CW(Continuose Wave) laser as a light source, CCD(charge Coupled Device) as a time integrator, and AOD(Acousto-Optic Device) as the space integrator. One of the advantages of the proposed system is that it does not require driving circuits of the light source. To implement the system, the linear frequency modulation(chirp) technique has been used for radar signal. The received data for the unit target was processed using 7.80 board and accompanying electronic circuits. In order to reduce the smear effect of the focused chirp signal which occurs Bragg diffrection angle of the AOD has been utilized to make sharp pulses of the laser source, and the pulse made synchronized with the chirp signal. Experiment and analysis results of the data and images detected from CCD of the proposed SAR system demonstrated that detection effect is degrated as the unit target distance increases, and the resolving power is improved as the bandwidth of the chirp signal increases. Also, as the pulse width of the light source decreases, the smear effect has been reduced. The experimental results assured that the proposed system in this papre can be used as a real time SAR processor.

• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.34S no.6
• /
• pp.67-76
• /
• 1997

In radar signal processing, an A/D converter with sufficient dynamic range and high sampling speed is required to detect the weakest target signals in heavy clutter and ECM environments. As the sampling frequency increases, the amount of digital data transfered to the signal processing module is also increased. To overcome these massive data transfer burden, we need an A/D conversion module with an enough data transfer rate. In this paper, we proposed an implementation scheme of a new A/D conversio module that can be used in multi-mode 3-D phased array radar signal processing system, and evaluated the performance. The proposed A/D conversion module is implemented with a standard A/D converter and a 6U-standard VME bus.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.16 no.6
• /
• pp.253-258
• /
• 2021

In this paper, we developed a hardware and software platform of the real-time data logging system to verify radar FEM (Front-end Module) and signal-processing algorithms. We developed a hardware platform based on FPGA (Field Programmable Gate Array) and DSP (Digital Signal Processor) and implemented firmware software to verify the various FEMs. Moreover, we designed PC based software platform to control radar logging parameters and save radar data. The developed platform was verified using 24 GHz multiple channel FMCW (Frequency Modulated Continuous Wave) in an environment of stationary and moving targets of chamber room.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.23 no.5
• /
• pp.41-46
• /
• 2023

It is very important to meet the maximum detection range in a radar system. In order to meet the maximum detection Range, the sensitivity of the received signal of the radar system must be high. In addition, the dynamic range should be wide in the radar signal processing board. To meet these requirements, the signal processing board must be designed to be robust against external and internal noise. In particular, a design is required to minimize the effect of noise generated by various switching circuits inside the board on the received radar signal. In this paper, we derive the requirements of the signal processor board to meet the radar system performance and describe the design to meet the derived requirements. In addition, the EMC design to minimize the influence of noise input from the outside or generated from the inside is described. Confirm the secured performance through the test of the manufactured board.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.19 no.6
• /
• pp.79-85
• /
• 2019

Recently, small radar require the development of small millimeter wave radar with high distance resolution to disable the target's system with a single strike. Small millimeter wave radar with high distance resolution need to process large amounts of data in real time to acquire and track target. In this paper, we summarized the real-time data preprocessing method to process the large amount of data required for small millimeter wave radar. In addition, the digital IF(Intermediate Frequency) receiver, Window processing, and, DFT(Discrete Fourier Transform) functions presented by real-time data preprocessing are implemented using FPGA(Field Programmable Gate Array). Finally the implemented real-time data preprocessing module was applied to the signal processor for small millimeter wave radar and verified by performance test related to the real-time preprocessing function.