• Korean Journal of Remote Sensing
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• v.21 no.6
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• pp.483-491
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• 2005

SAR signal processing technique has been considered a crucial technical part in order to generate an image from radar signal data and ADD (Agency for Defense Development) has focused on this area for years to develope our own SAR Processor for various SAR systems (Radarsat, ERS, KOMSAR). In this paper, we investigated major techniques related to generation of SAR images and developed ASPR (ADD SAR Processor for Radarsat) practically using the commercial Radarsat-1 radar signal data (RAW). We demonstrated the performance of the ASPR in comparison with the image generated by MDA and Vexcel's SAR Processor (FOCUS).

• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.85-91
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• 2020

Recently, a multi-mode radar system was designed for efficient operation of unmanned aerial vehicles (UAVs) in various environments, which has the advantage of being able to integrate and utilize methods of the pulse Doppler (PD) radar and the frequency modulated continuous wave (FMCW) radar. For the range detection part of the multi-mode radar signal processor (RSP), the hardware structure using the FFT processor and the IFFT processor is required to be designed in a way that improves efficiency on the area side. In addition, given the radar application environment that requires a variety of distance resolutions, FFT processors need to support variable-length operations. In this paper, the FFT processor and IFFT processor in multi-mode RSP range estimation are designed and proposed as hardware for a single FFT processor that supports variable length operation of 16-1024 points. The proposed FFT processor designed in hardware description language (HDL) and can be implemented with 7,452 logic elements and 5,116 registers.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.5
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• pp.333-340
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• 2003

Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.114-117
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• 2002

The airborne tracking radar is located in front of aircraft or missile and measures and tracks a target motion. The signal processor receives target signals from a receiver using A/D converters, and calculates the target motion, and transfers the data to the aircraft or missile control unit. Since the signal processing system is required to be lightweight and small size as well as high performance to calculate and analyze the received signal, we use high speed DSPs and SMD type components having low power consumption. In this paper, we describe the design concept of signal processing system of the airborne tracking radar.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.890-893
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• 2014

In this paper, we present a signal processing algorithm for a marine radar system, in which the evaluation of probability of collision as well as target detection and tracking are performed. Moreover, the digital signal processor that implements the algorithm is proposed. As simulation environment, a mechanically scanning antenna utilizing FMCW signal is used, conducting the beamforming operation with 1 degrees intervals. Test board consists of DSP chips and FPGA, which enable the implemented system to operate in real-time.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.7
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• pp.1147-1156
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• 2001

In this paper, a new design architecture of radar signal processor in real time is proposed. It has been designed and implemented under the consideration to minimize the inter-processor communication overhead and to maintain the coherence in Doppler pulse domain and in range domain. Its structure can be easily reconfigured and reprogrammed in accordance with an addition of function algorithm or a modification of operational scenario. As we designed a task configuration for parallel processing from measures of computation time for function algorithms and transmission time for results by signal processing, data exchange between processors for performing of function algorithms could be fully removed. Morocco-2 board equipped ADSP-21060 processor of Analog Devices inc. and APEX-3.2 developed for SHARC DSP were used to construct the radar signal processor.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.11
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• pp.1171-1177
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• 2009

A missile warning radar is an essential sensor for active protection system to detect antitank missile in all weather environments. This paper introduces missile warning radar for main battle tank and presents the results of the design and implementation of the radar signal processor using high speed multi-DSP. The key algorithms include adaptive CF AR, weighted linear fitting algorithm, S/W tracking capability, and threat decision and present test result.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1045-1059
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• 2011

A 3-D multi-function radar(MFR) is a modern radar to provide various target information, such as range, doppler, and angle by performing surveillance, multiple target tracking, and missile guidance. In this paper, we introduced a real-time radar signal processor(RSP), which is a crucial component of MFR with its design, implementation using high-speed multiple DSP, and performance. Additionally, we verified that several advanced signal processing algorithms were well-performed in our RSP, such as MCA-CFAR algorithm for target detection in clutter environment, range and velocity measurement algorithm using discriminator estimation, and noise jammer detection algorithm using local minimum selection.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.1
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• pp.79-87
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• 2019

Radar detection range is decreased with an increase in the noise levels and detection thresholds in adaptive CFAR of a radar signal processor to the weather clutter reflection signal in the rain. When a high-velocity plot is generated in weather clutter, what are detected are not targets but false plots. Detection opportunity is reduced by radar time resource consumption from additional confirmations regarding the false plots. In this paper, the received signals are saved using a radar-received signal storage device. Based on the analysis of the received signals from weather clutter, the influence of the rainfall reflection has been mitigated by front-end attenuation of the signal processor. The improvement in the detection performance is verified through received signal and simulation results.

• Journal of the Korea Institute of Military Science and Technology
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• v.25 no.4
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• pp.347-354
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• 2022

The synthetic aperture radar(SAR) is an equipment that can acquire images in all weathers day and night based on radar signals. The on-board processor of satellite SAR generates transmission signal by digital signal processing, converts it into an analog signal and transmits to antenna. Until the transmission signal generated by on-board processor is output, the signal passes the transmission cables and analog devices. At this time, these hardware distort the signal and makes SAR performance worse. To improve the performance, pre-distortion technique is used. But, general pre-distortion using taylor series is not sufficient to compensate for the distortion. This paper suggests transmit signal design method with improved pre-distortion. This paper uses envelop sampling method and interpolation filter for frequency domain compensation. The proposed method accurately compensates the hardware distortion and reduces resource usage of FPGA. To analyze proposed method's performance, IRF characteristics are compared when the proposed method applies to signal with errors.