Journal of Advanced Navigation Technology (한국항행학회논문지)

The Korean Navigation Institute (한국항행학회)
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Design of Low-complexity FFT Processor for Multi-mode Radar Signal Processing

멀티모드 레이다 신호처리를 위한 저복잡도 FFT 프로세서 설계

  • Park, Yerim (School of Electronics and Information Engineering, Korea Aerospace University) ;
  • Jung, Yongchul (School of Electronics and Information Engineering, Korea Aerospace University) ;
  • Jung, Yunho (School of Electronics and Information Engineering, Korea Aerospace University)
  • 박예림 (한국항공대학교 항공전자정보공학부) ;
  • 정용철 (한국항공대학교 항공전자정보공학부) ;
  • 정윤호 (한국항공대학교 항공전자정보공학부)
  • Received : 2020.03.27
  • Accepted : 2020.04.20
  • Published : 2020.04.30
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Abstract

Recently, a multi-mode radar system was designed for efficient operation of unmanned aerial vehicles (UAVs) in various environments, which has the advantage of being able to integrate and utilize methods of the pulse Doppler (PD) radar and the frequency modulated continuous wave (FMCW) radar. For the range detection part of the multi-mode radar signal processor (RSP), the hardware structure using the FFT processor and the IFFT processor is required to be designed in a way that improves efficiency on the area side. In addition, given the radar application environment that requires a variety of distance resolutions, FFT processors need to support variable-length operations. In this paper, the FFT processor and IFFT processor in multi-mode RSP range estimation are designed and proposed as hardware for a single FFT processor that supports variable length operation of 16-1024 points. The proposed FFT processor designed in hardware description language (HDL) and can be implemented with 7,452 logic elements and 5,116 registers.

최근 다양한 환경에서 무인기를 효율적으로 운용하기 위한 목적으로 멀티모드 레이다 시스템이 고안되었으며, 이는 PD (pulse Doppler) 방식과 FMCW (frequency modulated continuous wave) 방식을 통합하여 활용할 수 있다는 장점을 가진다. 멀티모드 레이다 시스템의 하드웨어 구조의 경우 FFT (fast Fourier transform) 프로세서와 IFFT (inverse fast Fourier transform) 프로세서가 필수적이지만, FFT 프로세서는 큰 복잡도를 갖는 구조 중 하나로 FFT 프로세서의 복잡도를 감소시키는 방향으로의 구조 설계가 필요하다. 또한, 다양한 거리 해상도를 요구하는 레이다 응용 환경을 고려했을 때, FFT 프로세서는 가변 길이의 연산을 지원할 필요가 있다. 이에 본 논문에서는 멀티모드 레이다 신호처리 프로세서 거리 추정부의 FFT 프로세서와 IFFT 프로세서를 16~1024 포인트의 가변 길이 연산을 지원하는 단일 FFT 프로세서의 하드웨어로 설계하여 제안한다. 제안된 FFT 프로세서는 MATLAB 기반 알고리즘 설계를 수행한 뒤, 그 결과를 토대로 Verilog-HDL (hardware description language)을 활용하여 RTL (register transfer level) 설계가 수행되었으며, 논리 합성 결과 총 총 7,452개의 logic elements, 5,116개의 registers로 구현 가능함을 확인하였다.

Keywords

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