• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.54 no.8
• /
• pp.350-354
• /
• 2005

This paper proposes a new method for delay time calculation in RLC interconnects. This method is simple, but precise. The proposed method can calculate delay time of RLC interconnects by simple numerical formula calculation without complex moment calculation using reduced model in RLC interconnects. The results using the proposed method for RLC circuits show that average relative error is within $10\%$ in comparison with HSPICE simulation results.

• International Journal of Highway Engineering
• /
• v.14 no.6
• /
• pp.67-73
• /
• 2012

PURPOSES : This study deals with the effects on the installation of RLC(Red Light Camera). The objective is to analyze the effects of accident reduction after the installation of RLC. METHODS : In pursuing the above, the study uses the 703 accident data occurred at the 64 intersections which RLC are installed or not installed. RESULTS : The main results are as follows. First, Poisson RLC accident model developed in this study is analyzed to be statistically significant. Second, using the above developed model, 33 intersections among 40 intersections are predicted to have the decreasing effects of accidents after the installation of RLC. Finally, the reduction effects are analyzed to be affected by ADT and the number of left-turn lane. CONCLUSIONS : This study is expected to improve the efficiency of RLC and to help in decision-making of RLC installation.

• 제어로봇시스템학회:학술대회논문집
• /
• 2002.10a
• /
• pp.75.1-75
• /
• 2002

Several model order reduction methods for large RLC circuits have been developed in the last few years. Krylop subspace based methods are extremely effective for generating the low order models of large system but there is no optimal theory for the resulting models. Alternatively, methods based truncated balanced realization have an optimality property but are too computationally expensive to use on complicated problems such as large RLC circuits. In this paper, we present a method for improving time domain response of reduced order RLC circuits. The method used here is based on combing Krylop subspace based method and truncated balanced realization method plus residualization. The metho...

• 전기의세계
• /
• v.22 no.2
• /
• pp.40-44
• /
• 1973

A method for obtaining state equation for nonlinear time-varying RLC networks is presented. The nonlinear time-varying RLC elements are decomposed by using Murata method to formulate nonlinear state equation. A nonlinear time-varying RLC network containing twin tunnel diode is solved as an example. In consequence of solving the examjple, simple methods are presented for revising the original network model so that the formulation of state equation is simplified.

• Journal of Electrical Engineering and Technology
• /
• v.10 no.4
• /
• pp.1752-1758
• /
• 2015

This paper presents partial discharge localization in stator winding of generators using multi-conductor transmission line (MTL) and RLC ladder network models. The high-voltage (HV) winding of a 6kV/250kW generator has been modeled by MATLAB software. The simulation results of the MTL and the RLC ladder network models have been evaluated with the measurements results in the frequency domain by applying of the Pearson’s correlation coefficients. Two PD generated calibrator signals in kHz and MHz frequency range were injected into different points of generator winding and the signals simulated/measured at the both ends of the winding. For partial discharge localization in stator winding of generators is necessary to calculate the frequency spectrum of the PD current signals and then estimate the poles of the system from the calculated frequency spectrum. Finally, the location of PD can be estimated. This theory applied for the above generator and the simulation/measured results show the good correlation for PD Location for RLC ladder network and MTL models in the frequency range of kHz (10kHz<f<1MHz) and MHz (1MHz<f<5MHz) respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.24 no.11
• /
• pp.1098-1103
• /
• 2013

A low-noise amplifier(LNA) using series RLC matching network and resistive feedback at 8 GHz is presented. Inductive degeneration is used for the input matching with which the proposed LNA shows quite a wide bandwidth in terms of $S_{21}$. An equivalent circuit model is deduced for input matching by conversion from parallel circuit to series resonant circuit. By exploiting the resistive feedback and series RLC input matching, fully integrated LNA achieves maximum $S_{21}$ of 8.5 dB(peak to -3 dB bandwidth is about 3.5 GHz) noise figure of 5.9 dB, and IIP3 of 1.6 dBm while consuming 7 mA from 1.2 V supply.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.5
• /
• pp.13-26
• /
• 1999

This paper presents a metric that can guide to optimal circuit models for interconnects among various models, given interconnect parameters and operating environment. To get this goal, we categorize interconnects into RC~c1ass and RLC-c1ass model domains based on the quantitative modeling error analysis using total resistance, inductance and capacitance of interconnects as well as operating frequency. RC~c1ass circuit models, which include most on~chip interconnects, can be efficiently analyzed by using the model~order reduction techniques. RLC-c1ass circuit models are constructed using one of three candidates, ILC(Iterative Ladder Circuit) macromodels, MC(Method of Characteristics) macromodels, and state-based convolution method, the selection process of which is based upon the allowable modeling error and electrical parameters of interconnects. We propose the model domain diagram leading to optimal circuit models and the division of model domains has been achieved considering the simulation cost of macromodels under the environmental assumption of the general purpose circuit simulator such as SPICE. The macromodeling method presented in this paper keeps the passivity of the original interconnects and accordingly guarantees the unconditional stability of circuit models.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.7 s.349
• /
• pp.20-28
• /
• 2006

A new TWA(Traveling-wave-based Waveform Approximation)-based signal integrity verification method for practical interconnect layout structures which are composed of non-uniform RLC lines with various discontinuities is presented. Transforming the non-uniform lines into virtual uniform lines, signal integrity of the practical layout structures can be very efficiently estimated by using the TWA-technique. It is shown that the proposed technique can estimate the signal integrity much more efficiently than generic SPICE circuit model with 5% timing error and 10% crosstalk error.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.15 no.7
• /
• pp.653-660
• /
• 2004

This paper presents monopole antenna with electromagnetically coupled feed and its equivalent circuit model. The proposed structure is consists of a rectangular disk-loaded monopole and a probe with rectangular spiral strip line feed. The rectangular disk-loaded monopole is represented by parallel RLC resonant circuit and the probe with rectangular spiral strip line feed is represented by series RLC resonant circuit. Therefore broad bandwidth can be achieved through electromagnetic coupling between these structures that generate two resonances within close frequency range. The antenna with electrical dimensions of only 0.075λ$\sub$0/${\times}$0.075λ$\sub$0/${\times}$0.075λ$\sub$0/ has 16.5 % fractional bandwidth for VSWR$\leq$2 at a center frequency of 2.038GHz.

• Proceedings of the IEEK Conference
• /
• 2004.06b
• /
• pp.435-438
• /
• 2004

This paper presents a new analytical model to suppress RLC resonance effects in power/ground lines due to a decoupling capacitor. First, the resonance frequency of an RLC circuit which is composed of package inductance. decoupling capacitor, and output drivers is accurately estimated. Next, using the estimated resonance frequency, a suitable decoupling capacitor sire is determined. Then, a novel design methodology to suppress the resonance effects is developed. Finally, its validity is shown by using $0.18 {\mu}m$ process-based-HSPICE simulation.