• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.2
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• pp.156-161
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• 2007

This paper describes the characteristics of polycrystalline ${\beta}$ or 3C (cubic)-SiC (silicon carbide) thin films heteroepitaxailly grown on Si wafers with thermal oxide. In this work, the poly 3C-SiC film was deposited by APCVD (atmospheric pressure chemical vapor deposition) method using HMDS (hexamethyildisilane: $Si_{2}(CH_{3}_{6})$ single precursor. The deposition was performed under various conditions to determine the optimized growth conditions. The crystallinity of the 3C-SiC thin film was analyzed by XPS (X-ray photoelectron spectroscopy), XRD (X-ray diffraction) and FT-IR (fourier transform-infrared spectometers), respectively. The surface morphology was also observed by AFM (atomic force microscopy) and voids or dislocations between SiC and $SiO_{2}$ were measured by SEM (scanning electron microscope). Finally, depth profiling was invesigated by GDS (glow discharge spectrometer) for component ratios analysis of Si and C according to the grown 3C-SiC film thickness. From these results, the grown poly 3C-SiC thin film is very good crystalline quality, surface like mirror and low defect. Therfore, the poly 3C-SiC thin film is suitable for extreme environment, Bio and RF MEMS applications in conjunction with Si micromaching.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2805-2810
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• 2010

The Passive Device called SAW Device of the ID Tag or a small sensor that can replace all of MEMS technology Micro Device. When using SAW Device will be able to replace that sensor control the power needed or separate space. Enlarge the scope of this advantage to use as a platform for various SAW Device is required. However, the current SAW Sensor development has many, but SAW Sensor that can leverage the platform's development is sketchy. Therefore, this paper implements SAW Reader can be measured in SAW Device Using an FPGA more simple and efficient Reader platform.

• Journal of Sensor Science and Technology
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• v.14 no.2
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• pp.131-135
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• 2005

This paper describes the ohmic contact formation of single crystalline 3C-SiC thin films heteroepitaxially grown on Si(001) wafers. In this work, a TiW (Titanium-tungsten) film as a contact matieral was deposited by RF magnetron sputter and annealed with the vacuum and RTA (rapid thermal anneal) process respectively. Contact resistivities between the TiW film and the n-type 3C-SiC substrate were measured by the C-TLM (circular transmission line model) method. The contact phases and interface the TiW/3C-SiC were evaulated with XRD (X-ray diffraction), SEM (scanning electron microscope) and AES (Auger electron spectroscopy) depth-profiles, respectively. The TiW film annealed at $1000^{\circ}C$ for 45 sec with the RTA play am important role in formation of ohmic contact with the 3C-SiC substrate and the contact resistance is less than $4.62{\times}10^{-4}{\Omega}{\cdot}cm^{2}$. Moreover, the inter-diffusion at TiW/3C-SiC interface was not generated during before and after annealing, and kept stable state. Therefore, the ohmic contact formation technology of single crystalline 3C-SiC using the TiW film is very suitable for high temperature MEMS applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.317-318
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• 2006

일반적인 CMOS공정으로는 높은 주파수 대역에서 높은 Q factor를 갖는 인덕터를 구현하는데 어렵고 이에 반해 RF ICs는 갈수록 high Q 를 가지는 인덕터가 요구되고 있다. 이를 LTCC 기판 위에 인덕터를 구현했을 때 높은 주파수 대역에서 성능을 알아보기 위해 모의 실험하였다. 인덕터를 설계하는데 있어서 인덕터 코일의 폭, 코일의 두께와 간격이 인덕터의 성능을 결정짓는다는 것을 고려하였고, MEMS 공정을 이용하여 high Q를 갖는 인덕터를 설계하였다. 인덕터의 전체 크기는 $330{\mu}m\;{\times}\;330{\mu}m$에서 선폭은 $30{\mu}m$, 선간의 간격은 $20{\mu}m$로 기판위에 $80{\mu}m$ 높이로 인덕터를 띄어서 설계하였고, 그리고 이를 LTCC 기판위에 high Q 의 인덕터 구현을 위해 simulation 한 결과가 Q값이 50 정도의 크기를 나타냈다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.181-181
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• 2008

DLC (Diamond-like Carbon) 박막은 높은 내마모성과 낮은 마찰 계수, 화학적 안정성 및 적외선 영역에서의 높은 투과율과 낮은 광 반사도, 높은 전기저항과 낮은 유전율, 전계방출특성 등 여러 가지 장점을 가진 물질이다[1]. 최근에는 DLC 박막의 여러 장점들과 산과 염기 유기용매에 대한 화학적 안정성으로 인하여 인조관절에서 인공심장의 판막에 이르기까지 의공학 관련 부품소재로 응용되고 있으며 내구성과 안정성에 있어서 탁월한 성능을 보여주고 있다. 또한 DLC 박막의 높은 경도와 낮은 마찰 계수, 부드러운 박막 표면 (수nm의 RMS 거칠기)의 장점을 살려 마그네틱 미디어와 하드디스크의 슬라이딩 표면에 사용되어지고, MEMS (Micro-Electro Mechanical System) 소자와 MMAs (Moving Mechanical Assemblies)의 고체윤활코팅으로 활용하여 미세기계의 내구성과 성능 향상을 도모할 수 있다. 이와 같이 DLC 박막은 다양한 분야에 응용되고 있으며, 박막이 지닌 여러 가지 장점들로 인하여 더 많은 분야에 응용될 가능성을 지닌 물질이다. 그러나 수 ${\mu}m$이상의 두께에서 박막이 높은 잔류응력 (residual stress)을 가지고, 열에 취약하여 이의 개선에 관한 연구들이 진행되어 지고 있다 [2]. 따라서 사용되는 목적에 따라 용도에 맞는 양질의 DLC 박막을 합성하기 위해선 합성 장치의 개발과 다양한 실험을 통한 최적의 합성조건 도출 등의 노력이 요구된다. 또한 DLC 박막 합성시의 여러 가지 증착 방법에 따른 박막 물성에 대한 재현성 확보 및 박막 증착에 관한 명확한 메커니즘 규명이 아직까지는 불분명하여 이에 관한 연구가 시급하다. 따라서 본 연구에서는 MEMS 소자와 MMAs의 고체윤활코팅으로 사용가능한 DLC 박막을 RF PECVD (Plasma Enhanced Vapor Deposition) 방식으로 합성하고 후열처리 온도에 따른 DLC 박막의 마찰계수 변화를 박막에 훼손을 주지 않는 FFM (Friction Force Microscopy) 방식을 사용하여 분석하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.27-34
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• 2004

The study on the RF substrate circuit is necessary to model RF output characteristics of deep submicron MOSFETs below 0.2$\mum$ gate length that have bun commercialized by the recent development of Si submicron process. In this paper, direct extraction methods are developed to apply for a simple substrate resistance model as well as another substrate model with connecting resistance and capacitance in parallel. Using these extraction methods, better agreement with measured Y22-parameter up to 30 GHz is achieved for 0.15$\mum$ CMOS device by using the parallel RC substrate model rather than the simple resistance one, demonstrating the RF accuracy of the parallel model and extraction technique. Using this model, bias and gate length dependent curves of substrate parameters in the RF region are obtained by increasing drain voltage of 0 to 1.2V at deep submicron devices with various gate lengths of 0.11 to 0.5㎛ These new extraction data will greatly contribute to developing a scalable RF nonlinear substrate model.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.74-77
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• 2002

Ferroelectric Random Access Memory(FRAM) and MEMS applications require noble metal or refractory metal oxide electrodes. In this study, Ru thin films were etched using $O_2$+10% $CF_4$ plasma in an inductively coupled plasma(ICP) etching system. The etch rate of Ru thin films was examined as function of rf power, DC bias applied to the substrate. The enhanced etch rate can be obtained not only with increasing rf power and DC bias voltage, but also with small addition $CF_4$ gas. The selectivity of $SiO_2$ over Ru are 1.3. Radical densities of oxygen and fluorine in $CF_4/O_2$ plasma have been investigated by optical emission spectroscopy(OES). The etching profiles of Ru films with an photoresist pattern were measured by a field emission scanning electron microscope (FE-SEM). The additive gas increases the concentration of oxygen radicals, therefore increases the etch rate of the Ru thin films and enhances the etch slope. In $O_2$+10% $CF_4$ plasma, the etch rate of Ru thin films increases up to 10% $CF_4$ but decreases with increasing $CF_4$ mixing ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.892-895
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• 2003

This paper describes on RIE(Reactive Ion Etching) characteristics of 3C-SiC(Silicon Carbide) grown on Si(100) wafers. During RIE of 3C-SiC films in this work, $CHF_3$ gas is used to form of polymer as a side wall for excellent anisotropy etching. From this process, etch rates are obtained a $60{\sim}980{\AA}/min$ by various conditions such as $CHF_3$ gas flux, $O_2$ addition ratio, RF power and electrode distance. Also, approximately $40^{\circ}$ mesa structures are successfully formed at 100 mTorr $CHF_3$ gas flow ratio, 200 W RF power and 30 mm electrode distance. Moreover, vertical side wall is fabricated by anisotropy etching with 50% $O_2$ addition ratio and 25 mm electrode distance. Therefore, RIE of 3C-SiC films using $CHF_3$ could be applicable as fabrication process technology for high-temperature 3C-SiC MEMS applications.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.467-468
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• 2006

In this work, we present the comparison between $d_{31}\;and\;d_{33}$ mode characterization using the PZT micro-actuator for large displacement. The PZT micro-actuator consisted of Si, PZT, and Pt layer on SOI wafer. The electrode shapes were laminated and interdigitated for $d_{31}\;and\;d_{33}$ mode, respectively. In order to characterize the actuation mode, we measured the displacement using laser interferometer. The maximum displacement of d31 mode was $12.2{\mu}m$ at 10V, the actuation characterization of d31 was better than that of d33 mode. We estimated that displacement of d33 mode would be larger than that of d31 above 30V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.7
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• pp.724-728
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• 2004

This paper describes on RIE(Reactive Ion Etching) characteristics of 3C-SiC(Silicon Carbide) grown on Si(100) wafers. In this work, CHF$_3$ gas was used to form the polymer as a function of a side-wall for excellent anisotropy etching during the RIE process. The ranges of the etch rate were obtained from 60 $\AA$/min to 980 $\AA$/min according to the conditions such as working gas pressure, RF power, distance between electrodes and the $O_2$ addition ratio in working gas pressure. Under the condition such as 100 mTorr of working gas pressure, 200 W of RF power and 30 mm of the distance between electrodes, mesa structures with about 40 of the etch angle were formed, and the vertical structures could be improved with 50 % of $O_2$ addition ratio in reactive gas during the RIE process. As a result of the investigation, we know that it is possible to apply the RIE process of 3C-SiC using CHF$_3$ for the development of electronic parts and MEMS applications in harsh environments.