• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.4
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• pp.311-316
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• 2010

$Zr_{0.7}Sn_{0.3}TiO_4$ (ZST) thin films were fabricated by metal-organic decomposition, and their dielectric properties were investigated in order to evaluate their potential use in passive capacitors for rf and analog/mixed signal integrated circuits. The ZST thin film annealed at the temperature of $800^{\circ}C$ showed a dielectric constant of 27.3 and a dielectric loss of 0.011. The capacitor using the ZST film had quadratic and linear voltage coefficient of capacitance (VCC) of -65 ppm/$V^2$ and -35 ppm/V at 100 kHz, respectively. It also exhibited a good temperature coefficient of capacitance (TCC) value of -32 ppm/$^{\circ}C$ at 100 kHz.

• ETRI Journal
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• v.33 no.3
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• pp.335-343
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• 2011

The pad pitch of modern radio frequency integrated circuits is in the order of few tens of micrometers. Connecting a large number of high-speed I/Os to the outside world with good signal fidelity at low cost is an extremely challenging task. To cope with this requirement, we need reflection-free transmission lines from an on-chip pad to on-board SMA connectors. Such a transmission line is very hard to design due to the difference in on-chip and on-board feature size and the requirement for extremely large bandwidth. In this paper, we propose the use of narrow tracks close to chip and wide tracks away from the chip. This narrow-to-wide transition in width results in impedance discontinuity. A step change in substrate thickness is utilized to cancel the effect of the width discontinuity, thus achieving a reflection-free microstrip. To verify the concept, several microstrips were designed on multilayer FR4 PCB without any additional manufacturing steps. The TDR measurements reveal that the impedance variation is less than 3 ${\Omega}$ for a 50 ${\Omega}$ microstrip and S11 better than -9 dB for the frequency range 1 GHz to 6 GHz when the width changes from 165 ${\mu}m$ to 940 ${\mu}m$, and substrate thickness changes from 100 ${\mu}m$ to 500 ${\mu}m$.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.195-196
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• 2007

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO, five divide-by-2 circuits and several buffers. The simulation results show that the designed circuit has a phase noise at 10kHz better than -87dBc/Hz throughout the signal band and consumes 10mA from a 1.8V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.10
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• pp.877-882
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• 2016

In this paper, a novel CMOS high Q factor 2-port active inductor has been proposed. The proposed circuit is designed by cascading basic gyrator-C structural active inductors and attaching the feedback LC resonance circuit. This LC resonator can compensate parasitic capacitance of transistor and can improve Q factor over wide frequency range. The proposed circuit was fabricated and simulated using 65 nm Samsung RF CMOS process. The fabricated circuit shows inductance of above 2 nH and Q factor higher than 40 in the frequency range of 1~6 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.5
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• pp.492-498
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• 2015

As the integration of circuit components increases steadily, various EMS(Electromagnetic Susceptibility) problems have emerged from integrated circuits and electrical systems. The electromagnetic susceptibility of VCOs(Voltage Controlled Oscillator) is especially critical in RF systems. Therefore, in this paper, through the phase noise theory that models electrical oscillators as linear time variant systems, the EMS characteristics of representative VCO -ring VCO and LC VCO- with 1.2 GHz of reference oscillating frequency are analyzed under the existence of the electromagnetic noise coupled in power supply. An simulation algorithm is developed to extract impulse response function based on the phase noise theory. When there is no supply noise, the magnitude of the jitter of two oscillators were similar to around 2.1 ps, but in presence of supply noise, the jitter was significantly lower in LC VCOs than ring VCOs.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.668-670
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• 2011

The Next-generation IT technology has been evolving from single technique to another which has merged, converging characteristics. The government categorized the 5 essential technologies to secure competitiveness in designing system semiconductors as smart motor vehicle info-tainment platform, smart TV multimedia system, smart phone analog interface technique, smart convergence digital communication and RF techniques, and advanced power management for smart devices. Also, it designated smart phone, smart TV, smart motor vehicle, and smart pad as the key industries. Such core techniques will become the key technologies of semiconductor design to secure the competitiveness of the next generation smart devices and the techniques can be transferred to fab-less design companies. In this contribution, we analyze the issues and the problems of the smart phone analog and interface techniques.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.128-133
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• 2013

In this paper, octagonal inductors for RFIC designs was fabricated with 90nm CMOS Technology to compare its quality factor and the effective inductance as functions of radius and number of turn. The quality factor decreases as the inner radius and the number of metal turned increase. However, the effective inductance increases with the increasing the inner radius and the number of metal turned. Therefore, the inductor structure should be decided according to the relative importance of Q-factor and inductance.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.8 s.338
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• pp.47-54
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• 2005

The design method for a dual frequency antenna using CPW feed lines is presented. The antenna structures can be simplified by CPW feed lines and easily designed on integrated circuits. The presented antenna has two resonant frequency ranges and each respective resonant frequency is determined by its own length of monopole antenna. We used an impedance matching method by using a monopole coupling related to the ground of CPW feed lines As a result, the resonant frequencies were 5.25[GHz] and 23.5[GHz] and their bandwidths $35.2\%,\;and\;41.3\%$, respectively, and also, the separation of the two frequencies $370\;%$. We presented an analytical designing method to implement a dual frequency monopole antenna and showed simple antenna structures having two frequency ranges for RFIC Integrations.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.4
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• pp.285-296
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• 2005

Reduced pressure chemical vapor deposition technology has been used to study SiGe heterostructure epitaxy and device issues, including SiGe relaxed buffers, proper control of Ge component and crystalline defects, two dimensional delta doping, and their influence on electrical properties of devices. From experiments, 2D profiles of B and P presented FWHM of 5 nm and 20 nm, respectively, and doses in 5×10/sup 11/ ∼ 3×10/sup 14/ ㎝/sup -2/ range. The results could be employed to fabricate SiGe/Si heterostructure field effect transistors with both Schottky contact and MOS structure for gate electrodes. I-V characteristics of 2D P-doped HFETs revealed normal behavior except the detrimental effect of crystalline defects created at SiGe/Si interfaces due to stress relaxation. On the contrary, sharp B-doping technology resulted in significant improvement in DC performance by 20-30 ％ in transconductance and short channel effect of SiGe HMOS. High peak concentration and mobility in 2D-doped SiGe heterostructures accompanied by remarkable improvements of electrical property illustrate feasible use for nano-sale FETs and integrated circuits for radio frequency wireless communication in particular.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.1-5
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• 2012

In this paper, matching characteristic of MIM (metal-insulator-metal) capacitor with $Al_2O_3/HfO_2/Al_2O_3$ (AHA) structure is analyzed. The floating gate capacitance measurement technique (FGMT) was used for analysis of matching characteristic of the MIM capacitors in depth. It was shown that matching coefficient of AHA MIM capacitor is 0.331%${\mu}m$ which is appropriate for application to analog/RF integrated circuits. It was also shown that the matching coefficient has a more strong dependence on the width than length of MIM capacitor.