• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.210-214
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• 2016

In this paper, the decrease in the contact resistance of Ni germanide/Ge contact was studied as a function of the thickness of the antimony (Sb) interlayer for high performance Ge MOSFETs. Sb layers with various thickness of 2, 5, 8 and 12 nm were deposited by RF-Magnetron sputter on n-type Ge on Si wafers, followed by in situ deposition of 15nm-thick Ni film. The contact resistance of samples with the Sb interlayer was lower than that of the reference sample without the Sb interlayer. We found that the Sb interlayer can lower the contact resistance of Ni germanide/Ge contact but the reduction of contact resistance becomes saturated as the Sb interlayer thickness increases. The proposed method is useful for high performance n-channel Ge MOSFETs.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.54-61
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• 1997

An accurate extraction technique is developed to determine full euqivalent circuit parameters of Si MOSFETs using 1 set of measured S-parametes without complicated optimization process. This technique is based on the use of anlytic Z-parameters experessions for resistances and inductances and the Y-parameter ones for ntrinsic parameters. This accuracy is proved over the wide range of gate voltage by observing good agreement between measured and fitted Z-parameter equations and frequency-independent response of the extracted intrinsic parameters. Using this technique, gate voltage-dependencies of model parameters are obained in the saturation region and these results show the similar behavior to the short-channel effects expected from the device theory.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.56-62
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• 2013

We present a rectifier for wireless power transmission using multiplier configuration in layout for MOSFETs which works at 13.56 MHz, designed to fit in CMOS process where conventionally used diodes are replaced with the cross-coupled MOSFETs. Full bridge rectifier structure without comparators is employed to reduce current consumption and to be working up to higher frequency. Multiplier configuration designed in layout reduces time delay originated from parasitic series resistance and shunt capacitance at each finger due to long connecting layout, leading to fast transition from on-state to off-state cross-coupled circuit structure and vice versa. The power conversion efficiency is significantly increased due to this fast transition time. The rectifier is fabricated in $0.11{\mu}m$ CMOS process, RF to DC power conversion efficiency is measured as 86.4% at the peak, and this good efficiency is maintained up to 600 MHz, which is, to our best knowledge, the highest frequency based on cross-coupled configuration.

• Journal of the Korean Vacuum Society
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• v.22 no.5
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• pp.245-249
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• 2013

The $HfO_X$ thin film was deposited what it has been paid attention to the next generation oxide thin layer of MOSFET (metal-Oxide semiconductor field-effect-transistor) by rf magnetron sputter on Si (100) substrate. The $HfO_X$ thin film was deposited using a various oxygen gas flows (5, 10, 15 sccm). After deposition, $HfO_X$ thin films were annealed from 400 to $800^{\circ}C$ for 20 min in nitrogen ambient. The electrical characteristics of the $HfO_X$ thin film was improved by leakage current properties, depending on the increase of oxygen gas flow and annealing temperature. In particular, the properties of nano-mechanics of $HfO_X$ thin films were measured by AFM and Nano-indenter. From the results, the maximum indentation depth at the basis of maximum indentation force was increased from 24.9 to 38.8 nm according to increase the annealing temperature. Especially, the indentation depth was increased rapidly at $800^{\circ}C$. The rapid increasement of indentation depth was expected to be due to the change of residual stress in the $HfO_X$ thin film, and this result was caused by relative flux of oxygen outgasing during the annealing process.

• Journal of Sensor Science and Technology
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• v.29 no.1
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• pp.14-18
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• 2020

This study investigates the nitrogen dioxide (NO₂) sensing characteristics of an Si MOSFET gas sensor with a tungsten trioxide (WO₃) sensing layer deposited using the sputtering method. The Si MOSFET gas sensor consists of a horizontal floating gate (FG) interdigitated with a control gate (CG). The WO₃ sensing layer is deposited on the interdigitated CG-FG of a field effect transistor(FET)-type gas sensor platform. The sensing layer is deposited with different thicknesses of the film ranging from 100 nm to 1 ㎛ by changing the deposition times during the sputtering process. The sensing characteristics of the fabricated gas sensor are measured at different NO₂ concentrations and operating temperatures. The response of the gas sensor increases as the NO₂ concentration and operating temperature increase. However, the gas sensor has an optimal performance at 180℃ considering both response and recovery speed. The response of the gas sensor increases significantly from 24% to 138% as the thickness of the sensing layer increases from 100 nm to 1 ㎛. The sputtered WO₃ film consists of a dense part and a porous part. As reported in previous work, the area of the porous part of the film increases as the thickness of the film increases. This increased porous part promotes the reaction of the sensing layer with the NO₂ gas. Consequently, the response of the gas sensor increases as the thickness of the sputtered WO₃ film increases.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1091-1097
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• 2013

This paper presents a rectifier with comparator using unbalanced body biasing in $0.11{\mu}m$ RF CMOS process. It is composed of MOSFETs and two comparators. The comparator is used to reduce reverse leakage current which occurs when the load voltage is higher than input voltage. For the comparator, unbalanced body biasing is devised. By using unbalanced body biasing, reference voltage for comparator changing from high state to low state is increased, and it reduces time interval for leakage current to flow. 13.56 MHz 2 Vpp signal is used for input and $1k{\Omega}$ resistor and 1 nF capacitor are used for output load for simulation and experimental environment. In simulation environment, voltage conversion efficiency(VCE) is 87.5 % and Power conversion efficiency(PCE) is 50 %. When the rectifier is measured, VCE shows 90.203 % and PCE shows 45 %.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.48-48
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• 2009

최근 빠른 동작속도와 고 집적도를 얻기 위해 metal oxide semiconductor field effect transistor (MOSFET) 의 크기는 계속 해서 줄어들고 있다. 동시에 게이트의 절연층도 얇아지게 된다. 절연층으로 사용되는 $SiO_2$ 의 두께가 2nm 이하로 얇아 지게 되면 터널링에 의해 누설 전류가 발생하게 된다. 이 문제를 해결하기 위해 $SiO_2$ 를 대체할 고유전체 물질의 연구가 활발하다. 고유전체 물질 중에는 $ZrO_2,\;Al_2O_3,\;HfO_2$ 등이 많이 연구 되어 왔다. 하지만 유전상수 이외에 band gap energy, thermodynamic stability, recrystallization temperature 등의 특성이 좋지 않아 대체 물질로 문제점이 있다. 이를 보안하기 위해 산화물을 합금과 결합시키면 서로의 장점들이 합쳐져 기준들을 만족하는 물질을 만들 수 있고 $HfAlO_3$가 그 중 하나이다. Al를 첨가하는 이유는 문턱전압을 낮추기 위해서다. $HfAlO_3$는 유전상수 18.2, band gap energy 6.5 eV, recrystallization temperature 800 $^{\circ}C$이고 열역학적 특성이 안정적이다. 게이트 절연층은 전극과 기판사이에 적층구조를 이루고 있어 이방성인 드라이 에칭이 필요하고 공정 중 마스크물질과의 선택비가 높아야한다. 본 연구는 $HfAlO_3$박막을 $BCl_3/Ar,\;N_2/BCl_3/Ar$ 유도결합 플라즈마를 이용해 식각했다. 베이스 조건은 RF Power 500 W, DC-bias -100 V, 공정압력 15 mTorr, 기판온도 40 $^{\circ}C$ 이다. 가스비율, RF Power, DC-bias, 공정 압력에 의한 마스크물질과 의 선택비를 알아보았다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.12
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• pp.924-928
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• 2010

In this study, $HfAlO_3$ thin films using gate insulator of MOSFET were etched in inductively coupled plasma. The etch characteristics of the $HfAlO_3$ thin films has been investigated by varying $O_2/BCl_3$/Ar gas mixing ratio, a RF power, a DC bias voltage and a process pressure. As the $O_2$ concentration increases further, $HfAlO_3$ was redeposited. As increasing RF power and DC bias voltage, etch rates of the $HfAlO_3$ thin films increased. Whereas, as decreasing of the process pressure, etch rates of the $HfAlO_3$ thin films increased. The chemical reaction on the surface of the etched the $HfAlO_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS). These peaks moved a binding energy. This chemical shift indicates that there are chemical reactions between the $HfAlO_3$ thin films and radicals and the resulting etch by-products remain on the surface.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.61-67
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• 2009

This paper reports an Integer-N phase locked loop (PLL) frequency synthesizer which was implemented in a 250nm standard digital CMOS process for a UHF RFID wireless communication system. The main blocks of PLL have been designed including voltage controlled oscillator, phase frequency detector, and charge pump. The LC VCO has been used for a better noise property and low-power design. The source and drain juntions of PMOS transistors are used as the varactor diodes. The ADF4111 of Analog Device has been used for the external pre-scaler and N-divider to divide VCO frequency and a third order RC filter is designed for the loop filter. The measured results show that the RF output power is -13dBm with 50$\Omega$ load, the phase noise is -91.33dBc/Hz at 100KHz offset frequency, and the maximum lock-in time is less than 600us from 930MHz to 970MHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.163-163
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• 2015

The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.