• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.7-10
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• 2003

Samsung SDI has developed a full color 5.0" WVGA AMOLED display with top emission and a super fine pitch of 0.1365mm(l86ppi), the world's highest resolution OLED display ever reported to date. Scan driver circuits and demux circuit were integrated into the display panel, using low temperature poly-Si TFT CMOS technology, and data driver circuit were mounted using COG chips. Peak luminescence was greater than 300cd/ $m^2$ with power consumption of 500mW with 30% of the pixels on illuminated.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.41.1-41
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• 1998

• Knowledge Management Research
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• v.20 no.3
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• pp.49-71
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• 2019

This study explores the role of knowledge sharing between their social capital and performance in R&D setting. R&D environment is composed of experts from various domains with different backgrounds, such as technologies and experiences. Thus, increasing team social capital and enhancing knowledge sharing are critical for R&D performance. Social capital and Knowledge sharing are classified into two : Social capital and Knowledge sharing within/outside team. A empirical study was conducted at a research institute of large company that leads the advanced research and development of the domestic chemical industry. Data was collected 292 copies out of 500 copies (Response rate 58.4%). The result indicated that both social capital within and outside team had a positive effect on R&D Performance. Social capital within team had a significant impact on knowledge sharing within the team only, and social capital outside team had a significant effect on knowledge sharing outside the team only. Only knowledge sharing outside the team had a positive effect on R&D Performance and the mediating role of knowledge sharing was acquired for social capital outside team and R&D Performance only. From these key findings, this study suggests that, within the team, social capital alone can achieve results, but outside the team, it is necessary that not only social capital but also knowledge sharing are needed in order to achieve results.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.46-49
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• 2002

Recent trends of low-temperature polycrystalline Si (LTPS) TFT technologies are presented. Characteristics of LTPS TFT processes are compared with those of a-Si TFT's. In order to compete with well-established a-Si TFT-LCD technology, LTPS process has to be as simple as possible. One of the most critical processes, recrystallization of a-Si thin films, could be the process for the differentiation of LTPS technology. Along with these technical reviews, a recent development of the 5.0-inch LTPS TFT-LCD is presented. In order to achieve high-performance display characteristics and save the power consumption, the transflective mode is adopted. The 5.0-inch display with 186 pixel-per-inch, high-resolution LCD was measured to be 10% for the reflectance and 70:1 for the contrast ratio. This display is designed for a high information content hand-held PC (HHPC) application.

• 한국생물공학회:학술대회논문집
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• 2003.10a
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• pp.651-652
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• 2003

• 한국생물공학회:학술대회논문집
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• 2003.10a
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• pp.649-650
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• 2003

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.325-328
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• 2002

We developed a high performance 2.2" active matrix OLED display for IMT-2000 mobile phone. Scan and Data driver circuits were integrated on the glass substrate, using low temperature poly-Si(LTPS) TFT CMOS technology. High efficiency EL materials were employed to the panel for low power consumption. Peak luminescence of the panel was higher than 250cd/$m^2$ with power consumption of 200mW.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.22-29
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• 2006

We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.68-73
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• 2006

We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

• Proceedings of the Korean Vacuum Society Conference
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• 2002.06a
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• pp.172-173
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• 2002