• Journal of IKEEE
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• v.20 no.1
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• pp.89-93
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• 2016

In this paper, we proposed SIMT based Image Signal Processor which can apply various image preprocessing algorithms and allow parallel processing of application programs such as image recognition. Conventional ISP has the hard-wired image enhancement algorithm of which the processing speed is fast, but there was difficult to optimize performance depending on various image processing algorithms. The proposed ISP improved the processing time applying SIMT architecture and processed a variety of image processing algorithms as an instruction based processor. We used Xilinx Virtex-7 board and the processing time compared to cell multicore processor, ARM Cortex-A9, ARM Cortex-A15 was reduced by about 71 percent, 63 percent and 33 percent, respectively.

• Journal of Korea Foundry Society
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• v.17 no.5
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• pp.465-471
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• 1997

An integrated computer program consisting of a pre-processor, main solver, and post-processor was developed for the design of large steel castings. The pre-processor, based on the AutoCAD, enables the user to produce approval drawings, casting design drawings and mesh diagrams in sequence using a personal computer. In the main solver, two numerical models were employed; one models the fluid flow during mold filling, and the other models the heat transfer and solidification. The post-processor can be used to present simulation results such as flow pattern, mold filling sequences, solidification times, temperature gradients and location of shrinkage defects by color graphics. In order to validate the applicability of the present integrated program, a series of experiments on simple-shaped steel castings were carried out. After the validation of the present model, it was applied to the casting design of the large steel anchor of an SC42 alloy. Various solidification parameters such as a temperature distribution and a solidification time in the casting and the mold were compared with those obtained experimentally. Simulated results predicting shrinkage defects were in good agreement with those obtained experimentally. It was found that the present method can be successfully applied to the quantitative casting design for complex-shaped large steel castings.

• Journal of information and communication convergence engineering
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• v.7 no.4
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• pp.516-520
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• 2009

RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, 32b*32b multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the status flag. In this paper, an efficient method to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The suggested method pre-analyzed the all possible cases so that the MAC unit can remove unnecessary calculations to speed up the execution. The proposed architecture prototype of the MAC unit was automatically synthesized, and successfully operated at 20MHz, which will be the operation frequency in the RSA processor.

• 한국정보통신설비학회:학술대회논문집
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• 2006.08a
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• pp.185-188
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• 2006

본 논문에서는 Moment 법을 이용한 안테나 해석 프로그램에 대해 다룬다. Delaunay 삼각화 알고리즘에 근거하여 pre-processor를 구현한다. Moment법을 이용하여 main-processor를 구현한다. S-parameter를 주파수 영역과 Smith Chart에 표시하고, 방사패턴을 다양한 각도에서 확인 할 수 있도록 post-processor를 구현한다. 해석 결과의 신뢰성을 위해 20GHz 에서 동작하는 고 이득 및 고지향성을 갖는 마이크로스트립 패치 안테나 어레이를 설계하고 이를 제작 및 측정한다. 측정결과와 상용 툴의 결과와 구현한 프로그램의 결과를 비교 및 분석한다.

• Spatial Information Research
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• v.10 no.4
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• pp.551-565
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• 2002

To carry out systematic groundwater assessment, exploration and management and to use these for protection of optimal groundwater yield, a data analysis and management system is required. Thus, the object of this research was to develop and apply software that integrates GIS and groundwater modeling: GISGAM (GIS for groundwater analysis and management system). The GIS program ArcView and the groundwater-modeling program MODFLOW were used for the GISGAM. The program components consist of a pre-processor, a processor, and a post-processor for groundwater modeling. In addition, GIS functions such as input, manipulation, analysis and output of data were embedded into the program. In applying the program to pilot area, topography, geology, soil, land use and well databases, and a groundwater flow model were constructed for the study area. This case study revealed the advantage and convenience of groundwater modeling using GIS capabilities. By integrating GIS and the groundwater model, the impact of changing values of hydrogeological constants on model results could be more easily evaluated.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.418-421
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• 2008

This paper presents the program to analyze an antenna for using the Moment Method. The program contains three different functional steps. In the first stage, the pre-processor is based on the Delaunay Triangulation Algorithm. The next stage, the main-processor, can be considered the core process of the program, which solutions are obtaining the linear matrix for using the Moment Method. The final stages, the name of the post-processor, analyze radiation patterns, which results are same with the S-parameters. The results demonstrate satisfactory agreement with the results for using other numerical packages and measurement data. We can confirm that the results of this program compare with the results of common program to analyze for an antenna.

• Proceedings of the Korea Concrete Institute Conference
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• 1996.04a
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• pp.270-274
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• 1996

Until recently pre & post-processing of finite element model has been heavily relied on expensive graphic peripheral devices. But today, with the aid of inexpensive microcomputers, very effective pre & postprocessor graphics has been developed. In this study, Pre & Post processor(MASSPRE, MASSPOST) of prediction analysis of thermal stress in mass concrete structure is developed. The developed pre & post processors are raise to the efficiency in making input data for the main program and analysis of the results produced by the main program. This MASSPOST presents a stress contour graph, volume slice, time-temperature history graph, time-stress history graph, etc.

• Proceedings of the Computational Structural Engineering Institute Conference
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• 1994.10a
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• pp.17-24
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• 1994

The pre- and post-processor for finite element structural analysis considering the user-friendly device are developed by using GUI. These can be used on WINDOWS' environment which is realized the multi-tasking and the concurrency by object-oriented paradigm. They are designed to control integratedly the pre-processing, execution and the post-processing of the finite element structural analysis program on multiple windows. These object-oriented modeling approach can be used for complex integrated engineering systems.

• ETRI Journal
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• v.35 no.3
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• pp.480-490
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• 2013

As technology evolves into the deep submicron level, synchronous circuit designs based on a single global clock have incurred problems in such areas as timing closure and power consumption. An asynchronous circuit design methodology is one of the strong candidates to solve such problems. To verify the feasibility and efficiency of a large-scale asynchronous circuit, we design a fully clockless 32-bit processor. We model the processor using an asynchronous HDL and synthesize it using a tool specialized for asynchronous circuits with a top-down design approach. In this paper, two microarchitectures, basic and enhanced, are explored. The results from a pre-layout simulation utilizing 0.13-${\mu}m$ CMOS technology show that the performance and power consumption of the enhanced microarchitecture are respectively improved by 109% and 30% with respect to the basic architecture. Furthermore, the measured power efficiency is about 238 ${\mu}W$/MHz and is comparable to that of a synchronous counterpart.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.207-213
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• 2006

This paper presents the design and implementation of a video processor for the device of need TV-OUT function. The designed video processor satisfies the standard conditions of ITU-R(International Telecommunication Union-Radiocommunication) BT.470. Also, in order to apply various digital device, we concentrate upon hardware complexity. ITU-R BT.470 can be classified as NTSC, PAL or SECAM. NTSC and PAL use QAM(Quardarature Amplitude Modulation) to transmit color difference signals and SECAM uses FM(Frequency Modulation). FM must have antic-cloche filter but filter recommended by ITU-R BT.470 is not easy to design due to sharpness of the frequency response. So this paper proposes that the special quality of anti-cloche filter is transformed easy to design and the modulation method is modified to be identical with the result required at standard. The processor can control power consumption by output mode to apply portable digital devices. The proposed processor is experimentally demonstrated with ALTERA FPGA APEX20KE EP20K1000EBC652-3 device and SAMSUNG LCD-TV.