• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.21 no.6
• /
• pp.681-689
• /
• 2010

We will demonstrate a novel topology for the feedforward amplifier. This amplifier does not use a delay element thus providing an efficiency enhancement and a size reduction by employing a distributed element negative group delay circuit. The insertion loss of the delay element in the conventional feedforward amplifier seriously degrades the efficiency. Usually, a high power co-axial cable or a delay line filter is utilized for a low loss, but the insertion loss, cost and size of the delay element still acts as a bottleneck. The proposed negative group delay circuit removes the necessity of the delay element required for a broadband signal suppression loop. With the fabricated 2-stage distributed element negative group delay circuit with -9 ns of total group delay, a 0.2 dB of insertion loss, and a 30 MHz of bandwidth for a wideband code division multiple access downlink band, the feedforward amplifier with the proposed topology experimentally achieved a 19.4 % power added efficiency and a -53.2 dBc adjacent channel leakage ratio with a 44 dBm average output power.

• Journal of Advanced Navigation Technology
• /
• v.14 no.3
• /
• pp.351-357
• /
• 2010

This paper proposes the adaptive class-E power amplifier with maintaining high power added efficiency (PAE) to apply RFID and wireless communication system. This switch mode amplifier is used a microprocessor to control a resonator circuits and to maintain high efficiency in case of input frequency variation. To validate the adaptive amplifier operation, which is a 450MHz operating frequency and a 100MHz bandwidth, the class E amplifier is implemented. As a result, the adaptive amplifier is maintained above 60% efficiency in frequency range and has a 74.8% maximum efficiency.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2010.05a
• /
• pp.673-675
• /
• 2010

This paper proposes the adaptive class-E power amplifier with maintaining high power added efficiency (PAE) in 400MHz range. This amplifier is used a microprocessor to adapt a resonator circuits and to maintain high efficiency in case of input frequency variation. To validate the adaptive amplifier operation, which is a 450MHz operating frequency and a 100MHz bandwidth, the class E amplifier is implemented. As a result, the adaptive amplifier is maintained above 60% efficiency and has a 74.8% maximum efficiency.

• Resources Recycling
• /
• v.11 no.5
• /
• pp.30-33
• /
• 2002

Recently in the progress of electronic equipment, power transformer was considered an important part. To make power transformer with miniaturization, lightening, low Power, we need a high efficiency core material. In this paper, we added $V_2$$O_{5}$ and $CaCo_3$ to Mn-Zn Ferrite to make a high efficiency, low loss core material. The compositions are MnO : ZnO : $Fe_2$$O_3$=37 : 11 : 52 mol%. They were sintered at 1250 for Three hours. Initial permeability was measured at 0.1 MHz. At 200 mT, Power loss was measured by temperature changing at 25 KHz, 50 KHz, 100 KHz. When we added $V_2$$O_{5}$ and $CaCo_3$, 0.08 wt%, 0.05 wt% respectively, we get 415 ㎾/㎥ at 200 mT, 100 KHz, $60^{\circ}C$. We can reduce eddy current loss as a main loss of high frequency by addition of a little mount of $V_2$$O_{5}$ $CaCo_3$. So we can decrease the power transformer's power loss.

• ETRI Journal
• /
• v.36 no.3
• /
• pp.498-501
• /
• 2014

A C-band 50 W high-power microwave monolithic integrated circuit amplifier for use in a phased-array radar system was designed and fabricated using commercial $0.25{\mu}m$ AlGaN/GaN technology. This two-stage amplifier can achieve a saturated output power of 50 W with higher than 35% power-added efficiency and 22 dB small-signal gain over a frequency range of 5.5 GHz to 6.2 GHz. With a compact $14.82mm^2$ chip area, an output power density of $3.2W/mm^2$ is demonstrated.

• ETRI Journal
• /
• v.33 no.1
• /
• pp.6-12
• /
• 2011

A case study of an active transmitting patch antenna revealed a characteristic loop locus of DC power versus RF output power as drive frequency was varied, with an operational bandwidth substantially smaller than the impedance bandwidth of the radiator. An approximate simulation technique, based on separation of the output capacitance of the power transistor, yielded easily visualized plots of power dependence on internal load impedance, and a simple interpretation of the experimental results in terms of a near-resonance condition between the output capacitance and output packaging inductance.

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.851-854
• /
• 1999

A high efficient, CMOS RF power amplifier at a 2.SV power supply for the band of 902-928MHz was designed and analyzed in 0.25${\mu}{\textrm}{m}$ standard CMOS technology. The output power of designed amplifier is being digitally controlled from a minimum of 2㎽ to a maximum of 21㎽, corresponding to a dynamic range of l0㏈ power control. The frequency response of this power amplifier is centered roughly at 915MHz. The power added efficiency of designed amplifer is almost 48% at maximum output power of 21㎽.

• Proceedings of the IEEK Conference
• /
• 2000.06e
• /
• pp.195-198
• /
• 2000

A CMOS power amplifier for wireless home networks is designed using 0.2sum 1-poly 5-metal standard CMOS technology and simulation results are presented. The power amplifier provides maximum output power of 16.5dBm to a 50-Ohm load at 2.450Hz and dissipates 220mW of dc power from a single 2.5-V supply. The designed CMOS power amplifier has power control range of 20dB and an overall power-added efficiency of 17%

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.26 no.9
• /
• pp.783-789
• /
• 2015

This paper presents a Doherty power amplifier(DPA) operating in the 2.6 GHz band for long term evolution(LTE) systems. In order to achieve high efficiency, second and third harmonic impedances are controlled using a compact output matching network. The DPA was implemented using a gallium nitride high electron mobility transistor(GaN-HEMT) that has many advantages, such as high power density and high efficiency. The implemented DPA was measured using an LTE downlink signal with a 10 MHz bandwidth and 6.5 dB PAPR. The implemented DPA exhibited a gain of 13.1 dB, a power-added efficiency(PAE) of 57.6 %, and an ACLR of -25.7 dBc at an average output power of 33.4 dBm.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.675-678
• /
• 1998

In this paper, power amplifiers for PCS phone were designed with the GEC Marconi H40 HEMT libray. The 1st stage was carefully designed in order to obtain k〉1 using a parallel resistor, and its S21 gain of 18.3dB and input reflection coefficient of -4dB were obtained. And S21 gain of 18dB and input reflection coefficient of -7dB were obtained from the 2nd stage. Finally, total S21 gain of 38dB, input reflection coefficient of -16dB, power gain of 35.2dB, output power of 28.7dBm and PAE(power added efficiency) of 29% were obtained from the designed MMIC power amplifiers. The chip size is $1.729$\times$0.94\textrm{mm}^2.$