• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.5 s.347
• /
• pp.48-53
• /
• 2006

This paper describes the electrical characteristics of monolithic optical transceiver circuitry being used in the fiber optic modules. It has been designed and fabricated, and compared with two chips version transceiver when operates at 155.52 Mbps data rates. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. To compare the two kind of fiber optic modules using each chip, single chip version has similar properties to two chip version in the electrical characteristics as noise and others.

• Journal of electromagnetic engineering and science
• /
• v.14 no.2
• /
• pp.47-53
• /
• 2014

This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.

• Journal of Electrical Engineering and information Science
• /
• v.2 no.6
• /
• pp.202-207
• /
• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

• Proceedings of the KIEE Conference
• /
• 2000.07d
• /
• pp.3124-3126
• /
• 2000

The application of IR(Infrared) communication is very wide and IR receiver has become a standard of home entertainment. A preamplifier with single 5V supply was designed for IR receiver IC. To operate at long distance, receiver IC should have high gain and low noise characteristic. To provide constant output signal magnitude, independent of transciever distance, gain limiting stage is needed. And to cut-off DC noise component effectively, large resistance and capacitance are required. Transimpedance type preamplifier, and diode limiting amplifier, and current limiting amplifier were designed. It is another function of current limiting amplifier that transforms single input signal to differential output signal. Using AMS BiCMOS model, both BJT version and MOS version was designed. Total power consumption is O.lmW, and IC size is $0.3mm^2$

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.64 no.12
• /
• pp.1730-1736
• /
• 2015

This paper presents a 16-channel transimpedance amplifier (TIA) array implemented in a standard $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR (PSL) systems. Since this array is the front-end circuits of the PSL systems to recover three dimensional image for unmanned vehicles, low-noise and high-gain characteristics are necessary. Thus, we propose a voltage-mode inverter TIA (I-TIA) array in this paper, of which measured results demonstrate that each channel of the array achieves $82-dB{\Omega}$ transimpedance gain, 565-MHz bandwidth for 0.5-pF photodiode capacitance, 6.7-pA/sqrt(Hz) noise current spectral density, and 33.8-mW power dissipation from a single 1.8-V supply. The measured eye-diagrams of the array confirm wide and clear eye-openings up to 1.3-Gb/s operations. Also, the optical pulse measurements estimate that the proposed 16-channel TIA array chip can detect signals within 20 meters away from the laser source. The whole chip occupies the area of $5.0{\times}1.1mm^2$ including I/O pads. For comparison, a current-mode 16-channel TIA array is also realized in the same $0.18-{\mu}m$ CMOS technology, which exploits regulated-cascode (RGC) input configuration. Measurements reveal that the I-TIA array achieves superior performance in optical pulse measurements.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.3
• /
• pp.250-255
• /
• 2011

This paper dealt with the design, fabrication and application of a risk voltage measurement system (RVMS) which analyzes the step and touch voltages in electrical grounding systems. The RVMS supply 300 V and 1.4 A in ranges from 40 Hz to 1 kHz as the test power source. A DAQ module having resolution of 400 kS/s and 16 bit is equipped with 7 inputs for measuring voltage and current. Also, a noise elimination algorithm of digital filter was applied to reduce the measurement error caused by external noises as a commercial frequency current. The performance of the RVMS was evaluated by measurement of the step and touch voltage according to the IEEE standard 80 and 81 in a grounding system with a 10 m counterpoise. The result showed that the RVMS analyzes the risk voltage with the error below 5%.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.2
• /
• pp.325-328
• /
• 2020

This paper demonstrated a voltage-controlled oscillator (VCO) using cost-effective (1-poly 6-metal) mixed signal standard CMOS process. To have the high-quality factor inductor in LC resonator with thin metal thickness, patterned-ground shields (PGS) was adopted under the spiral to effectively reduce the ac current of low resistive Si substrate. And, because of thin top-metal compared with that of RF option (2 ㎛), we make electrically connect between the top metal (M6) and the next metal (M5) by great number of via array along the metal traces. The circuit operated from 2.48 GHz to 2.62 GHz tuned by accumulation-mode varactor device. And the measured phase noise of LC VCO has -123.7 dBc/Hz at 1MHz offset at 2.62 GHz and the dc-power consumption shows 2.07 mW with 1.8V supply voltage, respectively.

• ETRI Journal
• /
• v.46 no.4
• /
• pp.708-715
• /
• 2024

We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.4
• /
• pp.13-20
• /
• 2008

This paper describes the design of low power 12bit Digital-to-Analog Converter(D/A Converter) using Pseudo-Segmentation method which shows the conversion rate of 80MHz and the power supply of 1.8V with 0.18um CMOS n-well 1-poly 6-metal process for advanced wireless communication system. Pseudo-segmentation method used in binary decoder consists of simple parallel buffer is employed for low power because of simpler configuration than that of thermometer decoder. Also, using deglitch circuit and swing reduced drivel reduces a switching noise. The measurement results of the proposed low power 12bit 80MHz CMOS D/A Converter shows SFDR is 66.01dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB is 10.67bit. Integral nonlinearity(INL) / Differential nonlinearity(DNL) have been measured ${\pm}1.6LSB/{\pm}1.2LSB$. Glich energy is measured $49pV{\cdot}s$. Power dissipation is 46.8mW at 80MHz(Maximum sampling frequency) at a 1.8V power supply.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.20 no.4
• /
• pp.195-200
• /
• 2020

With the growing interest in fossil fuel depletion and environmental pollution, railroad cars operating in Korea are in progress as the conversion from diesel to electric vehicles expands. The photovoltaic system, which is applied as an example of the conversion of electric vehicles, is infinite and pollution-free, and can produce energy without generating hazards such as air pollution, noise, heat, and vibration, and maintain fuel transportation and power generation facilities. There is an advantage that is rarely needed. However, the amount of electricity produced depends on the amount of solar radiation by region, and the energy density is low due to the power generation of about 25㎡/ kWp, so a large installation area is required and the installation place has limited problems. In view of these problems, many studies have been applied to fuel cells in the railway field. In particular, the plan to link the fuel cell power generation system railroad power supply system must be linked to the power supply system that supplies power to the railroad, unlike solar and wind power. Therefore, it has a close relationship with railroad cars and the linkage method can vary greatly depending on the system topology. Therefore, in this paper, we study the validity through simulation modeling related to linkage analysis according to system topology.