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http://dx.doi.org/10.5515/JKIEES.2014.14.2.47

A High Gain and High Harmonic Rejection LNA Using High Q Series Resonance Technique for SDR Receiver  

Kim, Byungjoon (School of Electrical Engineering and Computer Science, Institute of New Media and Communications, Seoul National University)
Kim, Duksoo (School of Electrical Engineering and Computer Science, Institute of New Media and Communications, Seoul National University)
Nam, Sangwook (School of Electrical Engineering and Computer Science, Institute of New Media and Communications, Seoul National University)
Publication Information
Abstract
This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.
Keywords
High Gain; High Harmonic Rejection; High Quality Factor Series Resonance; Impedance Transformation; SDR;
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1 A. A. Abidi, "The path to the software-defined radio receiver," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 954-966, May 2007.   DOI   ScienceOn
2 Z. Ru, E. A. M. Klumperink, G. J. M. Wienk, and B. Nauta, "A software-defined radio receiver architecture robust to out-of-band interference," in Proceedings of the IEEE Internal Solid-State Circuits Conference, San Francisco, CA, 2009, pp. 230-231.
3 Z. Ru, N. A. Moseley, E. A. M. Klumperink, and B. Nauta, "Digitally enhanced software-defined radio receiver robust to out-of-band interference," IEEE Journal of Solid-State Circuits, vol. 44, no. 12, pp. 3359-3375, Dec. 2009.   DOI   ScienceOn
4 D. K. Shaeffer and T. H. Lee, "Comment on corrections to "A 1.5-V, 1.5-GHz CMOS low noise amplifier," IEEE Journal of Solid-State Circuits, vol. 41, no. 10, p. 2359, Oct. 2006.
5 S. Lerstaveesin, M. Gupta, D. Kang, and B. S. Song, "A 48 860MHz CMOS low-IF direct-conversion DTV tuner," IEEE Journal of Solid-State Circuits, vol. 43, no. 9, pp. 2013-2024, Sep. 2008.   DOI   ScienceOn
6 R. Bagheri, A. Mirzaei, S. Chehrazi, M. E. Heidari, M. Lee, M. Mikhemar, A. A. Abidi, "An 800-MHz 6-GHz software-defined wireless receiver in 90-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2860-2876, Dec. 2006.   DOI   ScienceOn
7 H. Darabi and A. A. Abidi, "Noise in RF-CMOS mixers: a simple physical model," IEEE Journal of Solid-State Circuits, vol. 35, no. 1, pp. 15-25, Jan. 2000.   DOI   ScienceOn
8 F. Gatta, R. Gomez, Y. J. Shin, T. Hayashi, H, Zou, J. Y. C. Chang, P. Vorenkamp, "An embedded 65 nm CMOS baseband IQ 48MHz 1 GHz dual tuner for DOCSIS 3.0," IEEE Journal of Solid-State Circuits, vol. 44, no. 12, pp. 3511-3525, Dec. 2009.   DOI   ScienceOn
9 Z. Ru, E. A. M. Klumperink, C. E. Saavedra, and B. Nauta, "A 300 800MHz tunable filter and linearized LNA applied in a low noise harmonic-rejection RFsampling receiver," IEEE Journal of Solid-State Circuits, vol. 45, no. 5, pp. 967-978, May 2010.   DOI   ScienceOn
10 B. Kim, D. Kim, J. Song, J. Ko, and S. Nam, "A high selectivity tunable LNA with high Q series resonance for an SDR receiver," in Proceedings of the International Symposium on Antenna and Propagation, Jeju, Korea, 2011.
11 D. K. Shaeffer and T. H. Lee, "Corrections to "A 1.5-V, 1.5-GHz CMOS low-noise amplifier," IEEE Journal of Solid-State Circuits, vol. 40, no. 6, pp. 1397-398, Jun. 2005.   DOI   ScienceOn
12 D. K. Shaeffer and T. H. Lee, "A 1.5-V, 1.5-GHz CMOS low noise amplifier," IEEE Journal of Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997.   DOI   ScienceOn