• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2000.11a
• /
• pp.282-286
• /
• 2000

In this paper, magneto-rheological(MR) damper is studied for vibration control of large infra structures under earthquake. Generally, active control devices need a large control force and a high power supply system to reduce the vibration effectively. Large and miss tuned control force may induce the dangerous situation such that the generated large control force acts to amplify the structural vibration. Recently, to overcome the weaknesses of the active control, the semi-active control method is suggested by many researchers. Semi-active control uses the passive control device of which the characteristics can be modified. Control force of the semi-active device is not generated from the actuator with power supply. It is generated as a dynamic reaction force of the device same as in the passive control case, so the control system is inherently stable and robust. Unlike the case of passive control, control force of semi-active control is adjusted depending on the measured response of the structure, so the vibration can be reduced more effectively against various unknown environmental loads. Magneto-rheological(MR) damper is one of the semi-active devices. Dynamic characteristics of the MR material can be changed by applying the magnetic fields. So the control of MR damper needs only small power. Response time of MR to the input voltage is very short, so the high performance control is possible. MR damper has a high force capacity so it is adequate to the vibration control of large infra structure. Because MR damper has a nonlinear property, normal control method used in active control may not be effective. Clipped optimal control, modified bang-bang control etc. have been suggested to MR damper by many researchers. In this study, sliding mode fuzzy control(SMFC) is applied to MR damper. Genetic algorithm is used for the controller tuning. To verify the applicability of MR damper and suggested algorithm, numerical simulation on the aseismic control is carried out. Simulation model is three-story building structure, which was used in the paper of Dyke, et al. The control performance is compared with clipped optimal control. The present results indicate that the SMFC algorithm can reduce the earthquake-induced vibration very effectively.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.21 no.6
• /
• pp.163-171
• /
• 2021

In this paper, the energy transaction system was optimized by applying a resource allocation algorithm and deep reinforcement learning in the distributed power system. The power demand and supply environment were predicted by deep reinforcement learning. We propose a system that pursues common interests in power trading and increases the efficiency of long-term power transactions in the paradigm shift from conventional centralized to distributed power systems in the power trading system. For a realistic energy simulation model and environment, we construct the energy market by learning weather and monthly patterns adding Gaussian noise. In simulation results, we confirm that the proposed power trading systems are cooperative with each other, seek common interests, and increase profits in the prolonged energy transaction.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.12 no.7
• /
• pp.1048-1056
• /
• 2001

Decoupling capacitors are commonly used to reduce the effect of SSN propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs). In this paper, we introduced a simple high frequency measurement and proposed a wideband (50 MHz ∼3 GHz) equivalent circuit model for decoupling capacitor considering high frequency parasitic effects. The proposed model can be easily combined with the SPICE model of power supply planes far SSN analysis. The circuit simulations with the proposed model show good agreement with the measurement results. Also, we expect to accurately analyze the noise reduction effect as a function of value and location using the proposed model of decoupling capacitor.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.20 no.1
• /
• pp.117-122
• /
• 2016

In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.8
• /
• pp.1465-1470
• /
• 2006

This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications that is a promising international standard for short area wireless communications. The proposed circuit has been designed using TSMC $0.18{\mu}m$ CMOS process technology and two stage cascade topology by current reuse technique. Two stage cascade amplifiers use the same bias current in the current reused stage which leads to the reduction of the power dissipation. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results show that the LNA has a extremely low power dissipation of 1.38mW with a supply voltage of 1.0V. This is the lowest value among LNAs ever reported. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and minimum noise figure of 1.13dB.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.50 no.1
• /
• pp.15-22
• /
• 2001

In this paper, a VSC(Voltage Sag Corrector) is discussed for the purpose of power quality enhancement. A fast detecting technique of voltage sag is accomplished through the detection of instantaneous value on synchronous reference frame. A robust characteristic against the noise is available by inserting the first order low pass filter in the detection circuit. The formula and the filter design process is described properly with the mathematical equations. Because the VSC system supply the active power to load, it is required to design the proper size of the energy storage system, In this paper, the capacitor bank is used as an energy storage system, and the size of the capacitor is designed from the point of view of input/output energy as the output power rating and the amplitude and duration time of the voltage sag. The simulation is accomplished by PSCAD/EMTDC.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2005.05a
• /
• pp.962-965
• /
• 2005

A high intensity progressive wave tube is installed at Korea Aerospace Research Institute (KARI) for acoustic environmental tests. The test facility has 700 mm x 800 mm cross-sectional area, and provides acoustic environment of 165 dB over the frequency range of $25Hz{\sim}10,000Hz$. The facility consists of a 6 m long acoustic wave tube, acoustic power generation systems, gases nitrogen supply systems, and acoustic control systems. This paper describes how the basic parameters of the facility and power generation systems are controlled to meet the requirement of the test. The shape and length of the tube has been designed by using the size of test objects and the wave propagation characteristics of the tube. The capacity of acoustic power generation systems is determined by the energy conversion of acoustic wave and the efficiency of acoustic modulators. Moreover, the paper introduces test run results of the tube. Overall of 163dB has been generated by using the test facility.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.40 no.6
• /
• pp.16-23
• /
• 2003

In this paper, we propose an efficient bias circuit of discrete BJT component for hearing aid. The collector feedback bias circuit, widely used for the hearing aid, has a resistor for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor to the collector feedback bias circuit between base and power supply which is $\beta$ times target than the collector resistor. Thus. we can change amplifier gain without changing DC bias point, and reduce power noise gain about 18.5% compare to that of tile previous circuit in the simulation.

• ETRI Journal
• /
• v.33 no.3
• /
• pp.366-373
• /
• 2011

In this paper, we propose a low-power all-digital phase-locked loop (ADPLL) with a wide input range and a high resolution time-to-digital converter (TDC). The resolution of the proposed TDC is improved by using a phase-interpolator and the time amplifier. The phase noise of the proposed ADPLL is improved by using a fine resolution digitally controlled oscillator (DCO) with an active inductor. In order to control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. The die area of the ADPLL is 0.8 $mm^2$ using 0.13 ${\mu}m$ CMOS technology. The frequency resolution of the TDC is 1 ps. The DCO tuning range is 58% at 2.4 GHz and the effective DCO frequency resolution is 0.14 kHz. The phase noise of the ADPLL output at 2.4 GHz is -120.5 dBc/Hz with a 1 MHz offset. The total power consumption of the ADPLL is 12 mW from a 1.2 V supply voltage.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.64 no.1
• /
• pp.18-22
• /
• 2015

When using a secondary battery in energy storage units, if the grid is in light duty the active power is stored so it can be used when the grid is in heavy duty. This makes possible for the load equalize and make the grid optimized. Recently the government is trying to propagate this technology. Depending on its capacity this kind of electric energy storage unit is used in adjusting the frequency, break up the energy peak in summer and winter, stabilize the energy output of renewable energy which can change unstably because of the environment. Which makes it possible to stabilize the grid. It is anticipated that market of 120 trillion won will be developed worldwide in 2030. Currently in Korea a steady supply is in progress. However because of stray electromagnetic waves some other electronics are malfunctioning. This paper covers the research in the method to detect the emission noise in small electric energy storage units using lithium secondary batteries and battery management system, Power conditioning systems with CIPSR standards. And the research of a more efficient method to measure such stray electromagnetic waves.