[KSCI] Korea Science Citation Index Service

Design of Low Power CMOS LNA for using Current Reuse Technique

Cho In-Shin (한밭대학교 정보통신전문대학원)
Yeom Kee-Soo (한밭대학교 정보통신컴퓨터공학부)

Publication Information

Journal of the Korea Institute of Information and Communication Engineering / v.10, no.8, 2006 , pp. 1465-1470 More about this Journal

Abstract

This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications that is a promising international standard for short area wireless communications. The proposed circuit has been designed using TSMC $0.18{\mu}m$ CMOS process technology and two stage cascade topology by current reuse technique. Two stage cascade amplifiers use the same bias current in the current reused stage which leads to the reduction of the power dissipation. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results show that the LNA has a extremely low power dissipation of 1.38mW with a supply voltage of 1.0V. This is the lowest value among LNAs ever reported. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and minimum noise figure of 1.13dB.

Keywords

Current Reuse Technique; Low Power; CMOS; LNA; ZigBee;

Citations & Related Records

Times Cited By KSCI : 1 (Citation Analysis)

Reference
Cited By KSCI

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KSCI

Design of Low Power CMOS LNA for using Current Reuse Technique 전류 재사용 기법을 이용한 저전력 CMOS LNA 설계

Design of Low Power CMOS LNA for using Current Reuse Technique