• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.779-781
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• 2011

Drinking is one of most prominent causes for social problems like domestic violence, drinking and driving, and health problems. If who drunken can check promptly how much blood alcohol content, abstain from drunken driving or successive drinking schedule. In this paper, implementation of digital portable breathalyzer using semiconductor gas sensor based on MEMS were suggested. A small size micro controller with low power and surface mountable, ATMEGA48 can control semiconductor gas sensor digitally and display the value of alcohol concentration on LED.

• Vacuum Magazine
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• v.3 no.3
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• pp.15-18
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• 2016

In future wearable electronic systems, 3-dimensional (3D) devices have attracted much attention due to their high density integration and low-power functionality. Among 3D devices, gate-all-around (GAA) nanowire transistor provides superior gate controllability, resulting in suppressing short channel effect and other drawbacks in 2D metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon nanowires (SiNWs) are the most promising building block for GAA structure device due to their compatibility with the current Si-based ultra large scale integration (ULSI) technology. Moreover, the theoretical limit for subthreshold swing (SS) of MOSFET is 60 mV/dec at room temperature, which causes the increase in Ioff current. To overcome theoretical limit for the SS, it is crucial that research into new types of device concepts should be performed. In our present studies, we have experimentally demonstrated feedback FET (FBFET) and tunnel FET (TFET) with sub-60 mV/dec based on SiNWs. Also, we fabricated SiNW based complementary TFET (c-TFET) and SiNW complementary metal-oxide-semiconductor (CMOS) inverter. Our research demonstrates the promising potential of SiNW electronic devices for future wearable electronic systems.

• Transactions on Electrical and Electronic Materials
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• v.14 no.2
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• pp.94-100
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• 2013

The elements B, P and As can each be implanted in silicon; for the fabrication of integrated semiconductor devices and the wells in CMOS (complementary metal oxide semiconductor). The implanted range due to different implanted species calculated using TRIM (Transport of Ions in Matter) simulation results was considered. The profiles of implanted samples could be measured using SIMS (secondary ion mass spectrometry). In the comparison between the measured and simulated data, some deviations were shown in the profiles of MeV implanted silicon. The Moliere, C-Kr, and ZBL potentials were used for the range calculations, and the results showed almost no change in the MeV energy region. However, the calculations showed remarkably improved results through the modification of the electronic stopping power. The results also matched very well with SIMS data. The calculated tolerances of $R_p$ and ${\Delta}R_p$ between the modified $S_e$ of TRIM and SIMS data were remarkably better than the tolerances between the TRIM and SIMS data.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.101-102
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• 2005

SiC lateral power semiconductor device has high breakdown voltage and low on-state voltage drop due to the material characteristics. And, because the high breakdown voltage can be obtained, RESURF technique is mostly used in silicon power semiconductor devices. In this paper, we presents the electrical characteristics of the 4H-SiC RESURF LDMOSFET as a function of the epi-layer length, concentration and thickness. 240~780V of breakdown voltage can be obtained as a function of epi-layer length and thickness with same epi-layer concentration.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.299-304
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• 2018

An ideal circuit breaker should supply electric power to loads without losses in a conduction state and completely isolate the load from the power source by providing insulation strength in a break state. Fault current is relatively easy to break in an Alternating Current (AC) circuit breaker because the AC current becomes zero at every half cycle. However, fault current in DC circuit breaker (DCCB) should be reduced by generating a high arc voltage at the breaker contact point. Large fire may occur if the DCCB does not take sufficient arc voltage and allows the continuous flow of the arc fault current with high temperature. A semiconductor circuit breaker with a power electronic device has many advantages. These advantages include quick breaking time, lack of arc generation, and lower noise than mechanical circuit breakers. However, a large load capacity cannot be applied because of large conduction loss. An extinguishing technology of DCCB with polymeric positive temperature coefficient (PPTC) device is proposed and evaluated through experiments in this study to take advantage of low conduction loss of mechanical circuit breaker and arcless breaking characteristic of semiconductor devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.1-6
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• 2002

Plasma processing of semiconductor materials plays a dominant role in microelectronic technology. During last century, plasma have gone a way from laboratory phenomena to industrial applications due to intensive progress in both scientific and industrial trends. Improvement and development of new experience together with development of plasma theory and plasma diagnostics methods. A most parameters (pressure, flow rate, power density) and various levels of plasma system (energy distribution, volume gas chemistry, transport, heterogeneous effects) to understand the whole process mechanism. It will allow us to choose a correct ways for processes optimization.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.38-42
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• 2006

We report 1/f noise PSD(Power Spectrum Density) of sub-100 nm MOSFETs as a function of various parameters such as HCS (Hot Carrier Stress), bias condition, temperature, device size and types of MOSFETs. The noise spectra of sub-100 nm devices showed Lorentzian-like noise spectra. We could check roughly the position of a dominant noise source by changing $V_{DS}$. With increasing measurement temperature, the 1/f noise PSD of 50 nm PMOS device decreases, but there is no decrease in the noise of NMOS device. RTN (Random Telegraph Noise) was measured from the device that shows clearly a Lorentzian-like noise spectrum in 1/f noise spectrum.

• Progress in Superconductivity and Cryogenics
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• v.8 no.2
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• pp.20-24
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• 2006

Recently, utility network is becoming more and more complicated and huge due to IT and OA devices. In addition to, demands of power conversion devices which have non-linear switching devices are getting more and more increased. Consequently, because of the non-linear power semiconductor devices, current harmonics are unavoidable. Sometimes those current harmonics flow back to utility network and become one of the main reasons which can make the voltage distortion. Also, it makes noise and heat loss. On the other hands, voltage sag from sudden increasing loads is also one of the terrible problems inside of utility network. In order to compensate the current harmonics and voltage sag problem, AF(active filter) systems could be a good solution method. SMES is a very good promising source due to it's high response time of charge and discharge. Therefore, the combined AF and SMES system can be a wonderful device to compensate both harmonics current and voltage sag. However, SMES needs a superconducting magnetic coil. Because of using this superconducting magnetic coil, quench problem caused by unexpected reasons have always been unavoidable. Therefore, to solve out mentioned above, this paper presents a decisive method using shunt and series active filter system combined with SMES. Especially, authors analyzed the change of original energy capacity of SMES regarding to the size of resistance caused by quench of superconducting magnetic coil.

• Korean Journal of Materials Research
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• v.8 no.11
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• pp.977-981
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• 1998

Controlling the wafer temperatures from 200 to$500^{\circ}C$, low resistive tungsten thin films used for VLSI metallization are deposited by PECVD method. Resistivities of plasma deposited tungsten thin films are very sensitive to the $H_2/WF_6 $ partial pressure ratios. Residual stress behaviors of the films as a function of plasma power density were also studied. At the power density under the $0.7W/\textrm{cm}^2$, residual stress of W film is about $2.4\times10^9dyne/\textrm{cm}^2$. When the power density is. however, increased from 1.8 to $2.7W/\textrm{cm}^2$, residual stress is suddenly increased from $8.1\times10^9$ to $1.24\times10^{10}dyne/\textrm{cm}^2$ ue to the ion or radical bombardment at high power density.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.43-50
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• 2016

NAND flash based storage devices adopts multi-channel and multi-way architecture to improve performance using parallel operation of multiple NAND devices. However, multiple NAND devices consume higher current and peak power overlap problem influences on the system stability and data reliability. In this paper, current waveform is measured for erase, program and read operations, peak current and model is defined by profiling method, and estimated probability of peak current overlap among NAND devices. Also, system level TLM simulator is developed to analyze peak overlap phenomenon depending on various simulation scenario. In order to remove peak overlapping, token-ring based simple power management method is applied in the simulation experiments. The optimal peak overlap ratio is proposed to minimize performance degradation based on relationship between peak current overlapping and system performance.