• 대한전자공학회논문지
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• 제23권1호
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• pp.42-45
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• 1986

This paper introduces novel functionally integrated logic elements which are conceptuallized for large scale integrated circuits. Efforts are made to minimize the gate size as well as to reduce the operational voltage, without sacrificing the speed performance of the gates. The process used was a rather conventional collector diffusion isolation(CDI) process. New gate structures are formed by merging several transistors of a gate in the silicon substrate. Thested elements are CML(Current Mode Logic) and EECL (Emitter-to-Emitter Coupled Logic)gates. The obtained experimental results are power-delay product of 6~11pJ and delay time/gate of 1.6~1.8 ns, confirming the possibility of these novel gate structures as a VLSI-candidate.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.82-85
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• 2002

A compact rail to rail CMOS voltage follower is presented. The circuit is based on the symmetrical class AB voltage follower and can operate under supply voltages of ${\pm}$ 1.5 V. The proposed circuit has power dissipation of 5.2㎽ under quiescent condition and can drive ${\pm}$1.25 V to 250$\Omega$ load with a total harmonic distortion of less than 0.5 percent and cut off frequency of 237 ㎒. Although simple, the proposed circuit enables the output transistors to drive load efficiently.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2859-2862
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• 2003

본 논문에서는 과전류로부터 보호해야 할 트랜지스터의 정격전력을 고려해 protection level 을 결정하는 과 전류 보호회로를 제안하였다. 기존의 과전류 보호회로는 과부하시 출력 트랜지스터 양단 전압과는 무관하게 단순히 전류의 크기만을 감지해 보호회로를 동작시키기 때문에 출력 트랜지스터의 정격전력을 고려하지 않고 동작을 한다. 하지만 제안된 회로는 출력전압과 출력전류의 크기를 모두 감지해 protection 여부를 결정하기 때문에 protection 시 출력 트랜지스터에서의 소모전력이 거의 일정하도록 유지시켜준다. Protection level 설정에 있어서 기존 방식과 다른 점을 먼저 살펴보고, 실제 오디오 증폭기의 보호회로로 사용된 회로의 동작원리를 설명하겠다. 아울러 실험을 통해 검증된 과전류 보호회로의 동작 결과를 살펴보겠다.

• 전자공학회논문지A
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• 제32A권11호
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• pp.71-78
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• 1995

Based on the popular 4-transistor SRAM cell, an analytical expression of the minimum cell ratio was derived by modeling the static read operation. By analyzing the relatively simple expression for the minimum cell ratio, which was derived assuming the ideal transistor characteristics, effects of the changes in supply voltage and process parameters on the minimum cell ratio was predicted, and the minimum power supply voltage for read operation was determined. The results were verified by simulations utilizing the suggested simulation method, which is suitable for monitoring the lower limit of supply voltage for proper cell operation. From the analysis, it was shown that the worst condition for cell operation is low temperature and low supply voltage, and that the operation margin can be effectively improved by reducing the threshold voltage of the cell transistors.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권2호
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• pp.215-220
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• 2016

Monolithically integrated devices are strongly desired in next generation power ICs to reduce the chip size and improve the efficiency and frequency response. Three examples of the embedment of different functional diode(s) into AlGaN/GaN heterojunction field-effect transistors are presented, which can minimize the parasitic effects caused by interconnection between devices.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.192.1-192.1
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• 2015

We demonstrated the nonvolatile memory functionality of nano-crystalline silicon (nc-Si) and InGaZnOxide (IGZO) thin film transistors (TFTs) using mobile protons that are generated by very short time hydrogen neutral beam (H-NB) treatment in gate insulator (SiO2). The whole memory fabrication process kept under $50^{\circ}C$ (except SiO2 deposition process; $300^{\circ}C$). These devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We also executed hydrogen treatment in order to figure out the difference of mobile proton generation between PECVD and H-NB CVD that we modified. Our study will further provide a vision of creating memory functionality and incorporating proton-based storage elements onto a probability of next generation flexible memorable electronics such as low power consumption flexible display panel.

• 센서학회지
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• 제3권1호
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• pp.54-60
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• 1994

본 논문에서는 멀티센서 신호처리용 집적회로를 구성하였다. 제안된 회로는 멀티센서 신호 선택을 위한 아날로그 멀티플렉서, 노이즈 제거와 신호증폭을 위한 능동 필터, 디지탈 신호처리부와의 인터페이스를 위한 샘플-홀드 회로 등으로 구성하였다. 이러한 기능회로들을 CMOS 트랜지스터로 설계하여 집적화를 가능케 하였으며, 이로 인해 멀티센서 신호처리 시스템의 저소비전력화, 소형화를 구현케하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1012-1015
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• 1992

A gate-turn-off thyristor (GTO) that has a fuction of self-commutation is a device that can be turned on like a thyristor with a single pulse of gate current and turned-off by injecting a negative gate current pulse. GTOs have been in existence almost from the beginning of thyristor era, recently are these devices being developed with large power-handling capabilities and improved performance, and they are gaining popularity In conversion equipment. In this paper, the effects of internal parameters of GTO model using a circuit containing two transistors and three resistors the switching operation and the turn-off snubber characteristics is investigated using SPICE program.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 춘계종합학술대회
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• pp.330-334
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• 1999

This paper presents a new transient voltage blocking device (TBD) for commucation facilities with low power and high frequency bandwidth. Conventional protection devices have some problems such as low frequency bandwidth, low energy capacity and high remnant voltage. In order to improve these limitations, the new TBD, which consists of a gas tube, avalanche diodes and junction type field effect transistors (JFETs), was designed and fabricated JFETs were used as an active non-linear element and a high speed switching diode with low capacitance limits high current. Therefore the avalanche diodes with low energy capacity are protected from the high current, and the TBD has a very small input capacitance. From the performance test using surge generator, which can produce 1.2/50${\mu}\textrm{s}$ 4.2 k$V_{max}$, 8/20${\mu}\textrm{s}$ 2.1 kA$\sub$max/, it is confirmed that the proposed TBD has an excellent protection performance in tight clamping voltage and limiting current characteristics.

• 한국고분자학회:학술대회논문집
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• 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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• pp.170-170
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• 2006

[ ${\pi}-conjugated$ ] organic and polymeric semiconductors are receiving considerable attention because of their suitability as an active layer for electronic devices. An organic inverter with a full swing and a high gain can be obtained through the good qualities of the transfer characteristics of organic thin-film transistors (OTFTs); for example, a low leakage current, a threshold voltage ($V_{th}$) close to 0 V, and a low sub-threshold swing. One of the most critical problems with traditional organic inverters is the high operating voltage, which is often greater than 20 V. The high operating voltage may result in not only high power consumption but also device instabilities such as hysteresis and a shift of $V_{th}$ during operation. In this paper, low-voltage and little-hysteresis pentacene OTFTs and inverters in conjunction with PEALD $Al_{2}O_{3}\;and\;ZrO_{2}$ as the gate dielectrics are demonstrated and the relationships between the transfer characteristics of OTFT and the voltage transfer characteristics (VTCs) of inverter are investigated.