• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.3 no.2
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• pp.30-38
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• 1992

In this paper, in order to apply the $\pi$/4 shift QPSK to TCM, we propose the $\pi$/8 shift 8PSK modulation technique and the trellis-coded $\pi$/8 shift 8PSK performing signal set expansion and set partition by phase difference. In addition, the Viterbi decoder with branch metrics of the squared Euclidean distance of the first phase difference as well as the Lth phase difference is introduced in order to improve the bit error rate(BER) performance in differential detection of the trellis-coded $\pi$/8 shift 8 PSK. The proposed Viterbi decoder is conceptually the same as the sliding multiple de- tection by using the branch metric with first and Lth order phase difference. We investigate the performance of the uncoded .pi. /4 shift QPSK and the trellis-coded $\pi$/8 shift 8PSK with or without the Lth phase difference metric in an additive white Gaussian noise (AWGN) and Rayleigh fading channel using the Monte Carlo simulation. The study shows that the $\pi$/4 shift QPSK with the Trellis-code i. e. the trellis-coded $\pi$/8 shift 8PSK is an attractive scheme for power and bandlimited systems and especially, the Viterbi decoder with first and Lth phase difference metrics improves BER performance. Also, the next proposed algorithm can be used in the TC $\pi$/8 shift 8PSK as well as TC MDPSK.

• Nuclear industry
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• v.37 no.10
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• pp.93-96
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• 2017

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.6
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• pp.620-627
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• 2004

As h-bridge multilevel inverter is connected with series of single phase power cell, so it obtain high voltage using low voltage power semi-conductor and output voltage similar to sine wave. In this topology, the number of power cell increases in proportion to the output voltage level. Therefore, there are drawbacks that are responsibility against operating ability of main controller and signal wire increase. However, we can overcome this problems by the substitution of serial communication for the PWM signal in power cell control. Additionally, it has merits of reliability and maintenance. This paper deals with the synchronization and phase-shift method of power cell PWM using CAN(Controller Area Network) communication interrupt in H-bridge multilevel inverter. The advantages of proposed method are signal-line simplification using serial communication between main controller and cell controller, burden reduction in main controller, modularization of power cell, easy protection of each power cell, expandability improvement and reliability increase of control signal and power cell. This paper establishes propriety and reliability of proposed method through experiment of 13-level H-bridge multilevel inverter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.11
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• pp.2451-2456
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• 2011

This paper is a study on the high power amplifier to fulfill standards of the MOPS. VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. It also stated in DO-281A MOPS output power, symbol constellation error, spurious emissions, adjacent channel power must be met. We designed and measured the performance. The 38dB of the IM3 satisfies the MOPS standard.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.6
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• pp.632-637
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• 2000

In this paper, to control with light dimming levels of the fluorescent lamps, we have used the power line instead of the signal line to transmit the control signals. To reduce the BER(Bit Error Rate) on the power line communication with the serious noise interferences. We have adapted the FSK(Frequency Shift Keying) modulation and demodulation technique. Since the electronic ballast produced the EMI(ElctroMagnetic Interference) noise in some frequency bands, we have reduced the EMI levels in the band below -50dB. By varying the switching frequency of the ballast for the FL032/T8 from 18kHz to 25kHz, it is possible that the dimming levels are controled with the range of 5∼100%

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.2
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• pp.82-90
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• 2015

This paper proposes an efficient bi-directional DC/DC converter topology using multi-phase interleaved method for power storage system. The proposed converter topology is used for a power storage system using a vanadium redox flow battery(VRFB) and is configured to enable bidirectional power flow for charging and discharging of VRFB. Proposed DC/DC converter of the 4 leg method is reduced to 1/4 times the rating of the reactor and the power semiconductor device so can be reduce the system size. Also, proposed topology is obtained the effect of four times the switching frequency as compared to the conventional converter in each leg with a 90 degree phase shift 4 leg method. This can suppress the reduction of the life of the secondary battery because it is possible to reduce the current ripple in accordance with the charging and discharging of VRFB and may increase the efficiency of the entire system. In this paper, it proposed bidirectional high-efficiency DC/DC converter topology Using multi-phase interleaved method and proved the validity through simulations and experiments.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.45 no.1
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• pp.31-40
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• 2022

Six Sigma is a philosophy and systematic methodology for quality improvement. It encourages continuous quality improvement efforts to achieve the ideal goal of 6σ. Sigma(σ) is a statistic representing the standard deviation of the normal distribution, and 6σ level means a level where the tolerance of the specification is six times the standard deviation of the process distribution. In terms of the defective rate, the 6σ level achieves the 0.002 defectives per one million units. However, in the field, the 6σ level is used in the sense of achieving 3.4 defects per one million opportunities, which shows a large gap from the 6σ level in the statistical viewpoint. This is because field practitioners accept a 1.5σ shift of the mean of process when calculating the defective rate under sigma level. It said that the acceptance of 1.5σ shift of the mean is from experience, but there is no research or theoretical explanation to support it logically. Although it is a non-scientific explanation based on experience, considering that there has been no objection to the 1.5σ shift for a long time and it is rather accepted, it is judged that there is a reasonable basis for the 1.5σ shift. Therefore, this study tries to find a reasonable explanation through detective power of control chart via the run-rules to the 1.5σ shift empirically recognized by practitioners.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.9
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• pp.1048-1057
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• 2012

In this paper, a new compact dual-band unequal power divider is suggested. Instead of the quarter wavelength transmission line(TX-line)s for the branches of the conventional Wilkinson's power divider, we use composite right- and left-handed(CRLH) phase-shift lines and can reduce the physical length. With the non-linear dispersion of the meta-meterial, each branch in the proposed divider is designed to have $+90^{\circ}$ and $-90^{\circ}$ at $f_1$ and $f_2$ respectively. To validate the proposed method, the performances of the circuit and full-wave simulation results are shown with the CRLH dispersion curve. The measurement results are compared with the simulation results. Also, the size reduction effect by the proposed scheme is addressed.

• ETRI Journal
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• v.36 no.2
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• pp.321-324
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• 2014

This letter describes a two-phase clock oxide thin-film transistor shift register that executes a robust operation over a wide threshold voltage range and clock coupling noises. The proposed circuit employs an additional Q generation block to avoid the clock coupling noise effects. A SMART-SPICE simulation shows that the stable shift register operation is established for the clock coupling noises and the threshold voltage variation from -4 V to 5 V at a line time of $5{\mu}s$. The magnitude of coupling noises on the Q(15) node and Qb(15) node of the 15th stage is respectively -12.6 dB and -26.1 dB at 100 kHz in the proposed circuit, compared to 6.8 dB and 10.9 dB in a conventional one. In addition, the estimated power consumption is 1.74 mW for the proposed 16-stage shift registers at $V_{TH}=-1.56V$, compared to 11.5 mW for the conventional circuits.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.1
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• pp.54-61
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ ZVS FB DC/DC converter.