• Journal of the Korean Solar Energy Society
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• v.40 no.5
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• pp.23-34
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• 2020

Concentrator photovoltaic (CPV) system consists of high-quality complex optical elements, mechanical devices, and electronics components and can have the advantages of high integration and high-efficiency energy sources. III-V compound semiconductor cells have proven performance based on high reliability in the aerospace field, but have characteristics that require absolute support of the balance of systems (BOS) such as solar position trackers, receivers with heat sinks, and housing instruments. To determine the optimum parameters of secondary optical elements (SOEs) design for CPV systems, we designed three types of CPV modules, classified as non-SOEs type, reflective mirror type, and CPC lens type. We measured the I-V and P-V characteristics of the prototype CPV modules with the angle of inclination varying from 0° to 12° and with a 500-magnification Fresnel lens. The experimental results assumed misalignment of the solar position tracker or module design of pinpoint accuracy. As a result, at the 0° tilt angle, the CPC lens produced lower power due to the quartz transmittance ratio compared to that by other SOEs. However, for tilt angles greater than 3°, the CPC lens type module achieved high efficiency and stability. This study is expected to help design high-performance CPV systems.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.8
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• pp.525-529
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• 2017

Molybdenum oxide ($MoO_3$) offers pivotal advantages for high optical transparency and low light reflection. Considering device fabrication, n-type $MoO_3$ semiconductor can spontaneously establish a junction with p-type Si. Since the energy bandgap of Si is 1.12 eV, a maximum photon wavelength of around 1,100 nm is required to initiate effective photoelectric reaction. However, the utilization of infrared photons is very limited for Si photonics. Hence, to enhance the Si photoelectric devices, we applied the wide energy bandgap $MoO_3$ (3.7 eV) top-layer onto Si. Using a large-scale production method, a wafer-scale $MoO_3$ device was fabricated with a highly crystalline structure. The $MoO_3/p-Si$ heterojunction device provides distinct photoresponses for long wavelength photons at 900 nm and 1,100 nm with extremely fast response times: rise time of 65.69 ms and fall time of 71.82 ms. We demonstrate the high-performing $MoO_3/p-Si$ infrared photodetector and provide a design scheme for the extension of Si for the utilization of long-wavelength light.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.12
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• pp.1889-1894
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• 2017

Global automobile manufacturers are developing electric vehicles (EVs) to eliminate the pollutant emissions from internal combustion vehicles and to minimize fossil fuel consumptions for the future generations. However, EVs have a disadvantage of shorter traveling distance than that of conventional vehicles. To answer this shortfall, more batteries are installed in the EV to satisfy the consumer expectation for the driving range. However, as the energy capacity of the battery mounted in the EV increases, the amount of heat generated by each cell also increases. Naturally, a better battery thermal management system (BTMS) is required to control the temperature of the cells efficiently because the appropriate thermal environment of the cells greatly affects the power output from the battery pack. Typically, the BTMS is divided into an active and a passive system depending on the energy usage of the thermal management system. Heat exchange materials usually include gas and liquid, semiconductor devices and phase change material (PCM). In this study, an application of PCM for a BTMS was investigated to maintain an optimal battery operating temperature range by utilizing characteristics of a PCM, which can accumulate large amounts of latent heat. The system was modeled using Dymola from Dassault Systems, a multi-physics simulation tool. In order to compare the relative performance, the BTMS with the PCM and without the PCM were modeled and the same battery charge/discharge scenarios were simulated. Number of analysis were conducted to compare the battery cooling performance between the model with the aluminum case and PCM and the model with the aluminum case only.

• Journal of Sensor Science and Technology
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• v.30 no.5
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• pp.309-313
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• 2021

Organic semiconductors have received tremendous attention for their research because of their tunable electrical and optical properties that can be achieved by changing their molecular structure. However, organic materials are inherently unstable in the presence of oxygen and moisture. Therefore, it is necessary to develop moisture and air stable semiconducting materials that can replace conventional organic semiconductors. In this study, we developed a NiO_x thin film through a solution process. The electrical characteristics of the NiO_x thin film, depending on the thermal annealing temperature and UV-ozone treatment, were determined by applying them to the hole injection layer of an organic light-emitting diode. A high annealing temperature of 500 ℃ and UV-ozone treatment enhanced the conductivity of the NiO_x thin films. The optimized NiO_x exhibited beneficial hole injection properties comparable those of 1,4,5,8,9,11-hexaazatriphenylene hexacarbonitrile (HAT-CN), a conventional organic hole injection layer. As a result, both devices exhibited similar power efficiencies and the comparable electroluminescent spectra. We believe that NiO_x could be a potential solution which can provide robustness to conventional organic semiconductors.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.8
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• pp.1037-1043
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• 2020

This paper presents a new Physical Unclonable Function (PUF) security chip based on a low-cost, small-area, and low-power semiconductor process for IoT devices. The proposed security circuit has multiple challenge-to-response pairs (CRP) by adding the switching circuit to the cross-coupled path between two inverters of the SRAM structure and applying the challenge input. As a result, the proposed structure has multiple CRPs while maintaining the advantages of fast operating speed and small area per bit of the conventional SRAM based PUF security chip. In order to verify the performance, the proposed switched SRAM based PUF security chip with a core area of 0.095㎟ was implemented in a 180nm CMOS process. The measurement results of the implemented PUF show 4096-bit number of CRPs, intra-chip Hamming Distance (HD) of 0, and inter-chip HD of 0.4052.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.4
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• pp.641-648
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• 2023

Recently, the rapid growth of artificial intelligence among the 4th industrial revolution has progressed based on the performance improvement of semiconductor, and circuit integration. According to transistors, which help operation of internal electronic devices and equipment that have been progressed to be more complicated and miniaturized, the control of heat generation and improvement of heat dissipation efficiency have emerged as new performance indicators. The DUT(Device Under Test) Shell is equipment which detects malfunction transistor by evaluating the durability of transistor through heat dissipation in a state where the power is cut off at an arbitrary heating point applying the rating current to inspect the transistor. Since the DUT shell can test more transistor at the same time according to the heat dissipation structure inside the equipment, the heat dissipation efficiency has a direct relationship with the malfunction transistor detection efficiency. Thus, in this paper, we propose various method for PCB configuration structure to optimize heat dissipation of DUT shell and we also propose various transformation and thermal analysis of optimal DUT shell using computational fluid dynamics.

• Korean Journal of Materials Research
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• v.34 no.2
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• pp.111-115
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• 2024

Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

• Polymer(Korea)
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• v.33 no.3
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• pp.191-197
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• 2009

We have investigated the effect of strong p-type organic semiconductor $F_4$-TCNQ-doped CuPc hole transport layer on the performance of p-i-n type bulk heterojunction photovoltaic device with ITO/PEDOT:PSS/CuPc: $F_4$-TCNQ(5 wt%)/CuPc:C60(blending ratio l:l)/C60/BCP/LiF/Al, architecture fabricated via vacuum deposition process, and have evaluated the J-V characteristics, short-circuit current ($J_{sc}$), open-circuit voltage($V_{oc}$), fill factor(FF), and power conversion efficiency(${\eta}_e$) of the device. By doping $F_4$-TCNQ into CuPc hole transport layer, increased absorption intensity in absorption spectra, uniform dispersion of organic molecules in the layer, surface uniformity of the layer, and enhanced injection currents improved the current photovoltaic device with power conversion efficiency(${\eta}_e$) of 0.16%, which is still low value compared to silicone solar cell indicating that many efforts should be made to improve organic photovoltaic devices.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.6
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• pp.560-568
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• 2005

The proposed Multi-level PDP sustain Driver is composed of the semiconductor devices with low voltage rating compared to those used in the prior circuit proposed by L. Wether, and it has two resonant periods during the charging (rising period) and discharging (falling period) the PDP in the sustaining voltage waveforms. In accordance with the change of timing phase$(T_{r1},\;T_{i1},\;T_{r2})$, the performance characteristics of a commercial PDP module has been carried out and compared the characteristic with the 42V6, made of LG Electronics co., Experimental results show that the performance characteristics of PDP module are greatly influenced by the variation of $T_{i1}\;and\;T_{r2}$. The variation of $T_{r1}$ do not influence much on the performances of PDP. With the conditions that $T_{r1}=60ns,\;T_{i1}=120ns,\;and\;T_{r2}=350ns$, we could get the performances listed as the luminance is increased $14.6\%$, the power consumptions is decreased $5.9\%$, the panel efficiency is increased $24.2\%$, module efficiency is increased $21.2\%$, compared to those shown in the commercial PDP module (42V6). Therefore, the proposed multi-level PDP sustain driver expected to be suitable to actual PDP module application.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.3
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• pp.332-336
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• 2024

High-energy bandgap material silicon carbide (SiC) is gaining attention as a next-generation power semiconductor material, and in particular, SiC-based MOSFETs are developed as representative power semiconductors to increase the breakdown voltage (BV) of conventional planar structures. However, as the size of SJ (Super Junction) MOSFET devices decreases and the depth of pillars increases, it becomes challenging to uniformly form the doping concentration of pillars. Therefore, a structure with different doping concentrations segmented within the pillar is being researched. Using Silvaco TCAD simulation, a SJ VVD (vertical variation doping profile) MOSFET with three different doping concentrations in the pillar was studied. Simulations were conducted for the width of the pillar and the doping concentration of N-epi, revealing that as the width of the pillar increases, the depletion region widens, leading to an increase in on-specific resistance (R_on,sp) and breakdown voltage (BV). Additionally, as the doping concentration of N-epi increases, the number of carriers increases, and the depletion region narrows, resulting in a decrease in R_on,sp and BV. The optimized SJ VVD MOSFET exhibits a very high figure of merit (BFOM) of 13,400 KW/cm², indicating excellent performance characteristics and suggesting its potential as a next-generation highperformance power device suitable for practical applications.