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A Study on Performance Characteristics of Multi-level PDP Driver Circuit in Accordance of Signal Timing Variation  

Kim Jung-Soo (국민대 전자공학과)
Roh Chung-Wook (국민대 전자정보통신공학부)
Hong Sung-Soo (국민대 전자정보통신공학부)
Sakong Sug-Chin (국민대 전자정보통신공학부)
Publication Information
The Transactions of the Korean Institute of Power Electronics / v.10, no.6, 2005 , pp. 560-568 More about this Journal
Abstract
The proposed Multi-level PDP sustain Driver is composed of the semiconductor devices with low voltage rating compared to those used in the prior circuit proposed by L. Wether, and it has two resonant periods during the charging (rising period) and discharging (falling period) the PDP in the sustaining voltage waveforms. In accordance with the change of timing phase$(T_{r1},\;T_{i1},\;T_{r2})$, the performance characteristics of a commercial PDP module has been carried out and compared the characteristic with the 42V6, made of LG Electronics co., Experimental results show that the performance characteristics of PDP module are greatly influenced by the variation of $T_{i1}\;and\;T_{r2}$. The variation of $T_{r1}$ do not influence much on the performances of PDP. With the conditions that $T_{r1}=60ns,\;T_{i1}=120ns,\;and\;T_{r2}=350ns$, we could get the performances listed as the luminance is increased $14.6\%$, the power consumptions is decreased $5.9\%$, the panel efficiency is increased $24.2\%$, module efficiency is increased $21.2\%$, compared to those shown in the commercial PDP module (42V6). Therefore, the proposed multi-level PDP sustain driver expected to be suitable to actual PDP module application.
Keywords
Plasma Display Panel (PDP); Energy recovery sustain circuit;
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