• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2005년도 추계종합학술대회
• /
• pp.747-750
• /
• 2005

In this paper, we propose a new level shifter circuit for reducing power consumption. The concept of the proposed level shifter is to use capacitive coupling effect to reduce short circuit current. The power consumption of the proposed level shifter is reduced up to 50%, compared to the conventional level shifter. Especially the proposed level shifter circuit works well with low temperature poly-Si (LTPS) TFTs. It can operate on low input voltage even with low-mobility, high and widely-varying threshold voltage of LTPS TFT.

• Journal of Power Electronics
• /
• 제16권4호
• /
• pp.1316-1323
• /
• 2016

Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.

• Journal of Power Electronics
• /
• 제14권5호
• /
• pp.937-945
• /
• 2014

This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge (CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-level space vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involved computational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized (FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. The developed techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation (SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400 field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.

• 전력전자학회논문지
• /
• 제23권6호
• /
• pp.415-423
• /
• 2018

This study uses a level selection algorithm with fixed sampling frequency for modular multilevel converter (MMC) systems. Theoretically, the proposed method increases the level infinitely while the sampling time remains the same. The proposed method called cluster stream buffer (CSB) consists of several clusters, wherein each cluster is composed of 32 submodules that depend on the level of the submodules in the MMC system. To increase the level of the MMC system, additional clusters are used, and the sampling time between clusters is determined from the sampling time between levels needed for utilizing the entire level from the MMC system. This method is crucial in the control of MMC-type HVDC systems because it improves scalability and precision.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2012년도 추계학술대회 논문집
• /
• pp.661-662
• /
• 2012

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2010년도 춘계학술대회 논문집
• /
• pp.509-510
• /
• 2010

• Journal of Electrical Engineering and Technology
• /
• 제10권1호
• /
• pp.146-154
• /
• 2015

This paper proposes a control method for maintaining the energy level for a supercapacitor energy storage system coupled with a wind generator to stabilize wind power output. Although wind power is green and clean energy source, disadvantage of the renewable energy output power is fluctuation. In order to mitigate the fluctuating output power, supercapacitor energy storage system (SCESS) and wind power simulator is developed. A remaining energy supercapacitor (RESC) control is introduced and analyzed to smooth for short-term fluctuating power and maintain the supercapacitor voltage within the designed operating range in the steady as well as transient state. When the average and fluctuating component of power increases instantaneously, the RESC compensates fluctuating power and the variation of fluctuating power is reduced 100% to 30% at 5kW power. Furthermore, supercapacitor voltage is maintained within the operating voltage range and near 50% of total energy. Feasibility of SCESS with RESC control is verified through simulation and experiment.

• 대한전기학회논문지:전력기술부문A
• /
• 제53권9호
• /
• pp.494-499
• /
• 2004

This paper presents to compute the power economic dispatch, an optimal power flow (OPF) computation algorithm, considering the load power factor limits constraint in developed. Efficient reactive power planning enhances economic operation as well as system security. Accordingly, an adequate level of power factor limits for the load busesshould be evaluated for economic operation. In this paper, the ranges of acceptable load power factors are portrayed as bandwidths of load power factor expressed as a function of load level. The load power factor limits are included and described into the OPF's objective function. The method Proposed is applied to IEEE 26 bus system.

• 조명전기설비학회논문지
• /
• 제23권10호
• /
• pp.29-35
• /
• 2009

본 논문에서는 두 가지 전압을 이용하여 직류 전력선을 이용한 양방향 다중직렬통신 드라이버의 구현과 이를 위한 소형화 회로 설계에 대하여 다룬다. 다중접속통신은 호스트에 고유의 ID를 갖는 여러 개의 클라이언트와 패킷에 의한 데이터 전송을 행한다. 양방향 통신을 위하여 호스트에서 데이터 1/0이 전송될 경우, 각 경우에 24[V]/12[V]전원을 선택하며 클라이언트가 데이터를 전송할 때, 호스트는 통신선로의 전압을 감지하여 전송하는 데이터에 따라, 24[V]/12[V]전원을 선택한다. 이러한 기능을 구현하는 소형 드라이버 회로를 설계, 제작하여 호스트와 클라이언트의 직렬 통신 포트에 접속하였으며, 하나의 호스트와 여러 개의 클라이언트로 네트워크을 구현하고 실험에 의하여 직류 전력선을 이용한 양방향 직렬통신의 기능을 확인하였다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
• /
• pp.227-231
• /
• 2001

A new primary-side-assisted zero-voltage and zero-current switching (ZVZCS) three-level DC-DC converter with flying capacitor is proposed. The three-level converters are promising in high voltage applications, and ZVZCS is a very effective means for reducing switching losses. The proposed DC-DC converter uses only one auxiliary transformer and two diodes to obtain ZCS for the inner leg. It has a simple and robust structure, and offers soft-switching capability even in short-switching conditions. The proposed converter was verified by experiments in a 6KW prototype designed for communication applications and operating at 100kHz.