• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.370-371
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• 2011

This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.

• Journal of the Korean Society of Industry Convergence
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• v.26 no.6_2
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• pp.1117-1125
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• 2023

The DC part of the DC microgrid power conversion system uses capacitors for buffers of charge and discharge energy for smoothing voltage and plays important roles such as high frequency component absorption, power balancing, and voltage ripple reduction. The capacitor uses an aluminum electrolytic capacitor, which has advantages of capacity, low price, and relatively fast charging/discharging characteristics. Aluminum electrolytic capacitors(AEC) have previous advantages, but over time, the capacity of the capacitors decreases due to deterioration and an increase in internal temperature, resulting in a decrease in use efficiency or an accident such as steam extraction due to electrolyte evaporation. It is necessary to take measures to prevent accidents because the failure diagnosis and detection of such capacitors are a very important part of the long-term operation, safety of use, and reliability of the power conversion system because the failure of the capacitor leads to not only a single problem but also a short circuit accident of the power conversion system.

• Journal of Power Electronics
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• v.15 no.1
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• pp.31-38
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• 2015

In this paper, a buck-boost type battery charger is developed for charging battery set with a lower voltage. This battery charger is configured by a rectifier circuit, an integrated boost/buck power converter and a switched capacitors circuit. A boost power converter and a buck power converter sharing a common power electronic switch are integrated to form the integrated boost/buck power converter. By controlling the common power electronic switch, the battery charger performs a hybrid constant-current/constant-voltage charging method and gets a high input power factor. Accordingly, both the power circuit and the control circuit of the developed battery charger are simplified. The switched capacitors circuit is applied to be the output of the boost converter and the input of the buck converter. The switched capacitors circuit can change its voltage according to the utility voltage so as to reduce the step-up voltage gain of the boost converter when the utility voltage is small. Hence, the power efficiency of a buck-boost type battery charger can be improved. Moreover, the step-down voltage gain of the buck power converter is reduced to increase the controllable range of the duty ratio for the common power electronic switch. A prototype is developed and tested to verify the performance of the proposed battery charger.

• Journal of the Korean institute of surface engineering
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• v.35 no.3
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• pp.127-132
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• 2002

High speed performance of ferroelectric Pb(Zr,Ti)$O_3$ (PZT) based capacitors is reported. La substitution up to 10% was performed to systematically lower the coercive and saturation voltages of epitaxial ferroelectric capacitors grown on Si using a ($Ti_{0.9}$ /$Al_{0.1}$ )N/Pt conducting barrier composite. Ferroelectric capacitors substituted with 10% La show significantly lower coercive voltage compared to capacitors with 0% and 3% La. This is attributed to a systematic decrease in the tetragonality (i.e., c/a ratio) of the ferroelectric phase. Furthermore, the samples doped with 10% La showed dramatically better retention and pulse width dependent polarization compared to the capacitors with 0% and 3% La. These capacitors show promise as storage elements in low power high density memory architectures.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.99-105
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• 2004

A shared-capacitor charge-sharing ROM (SCCS-ROM) using dummy bit lines is proposed. The SCCS-ROM reduces the bit line swing voltage using the charge-sharing technique of the conventional charge-sharing ROM (CS-ROM). Although the CS-ROM needs three small capacitors per output bit, the proposed SCCS-ROM shares the capacitors so that it needs only three capacitors. The SCCS-ROM implements the capacitors using dummy bit lines. This not only increases noise immunity but also reduces power. A SCCS-ROM with 8K${\times}$15bits implemented in a 0.35${\mu}{\textrm}{m}$ CMOS process. The SCCS-ROM consumes 8.63㎽ at 100MHz with 3.3V The simulation results show that the SCCS-ROM reduces 8.4% power compared to the CS-ROM.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.4
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• pp.186-191
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• 2012

DC Bus Electrolytic capacitors have been widely used in power conversion system because they can achieve high capacitance and voltage ratings with volumetric efficiency and low cost. This type of capacitors have been traditionally used for filtering, voltage smoothing, by-pass and other many applications in power conversion circuits requiring a cost effective and volumetric efficiency components. Unfortunately, electrolytic capacitors are some of the weakest components in power electronic converter. Many papers have proposed different methods or algorithms to determinate the ESR and/or capacitance C for fault diagnosis of the electrolytic capacitor. However, both ESR and C vary with frequency and temperature. Accurate knowledge of both values at the capacitors operating conditions is essential to achieve the best reference data of fault judgement. According to parameter analysis, the capacitance increases with temperature and the ESR decreases. Higher frequencies make the ESR and C to decrease. Analysis results show that the proposed electrolytic capacitor parameter estimation technique can be applied to reference signal of capacitor diagnosis systems successfully.

• Journal of Power Electronics
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• v.17 no.3
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.54 no.6
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• pp.274-283
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• 2005

This paper presents a new method to derive energy function based on vector product. Using this method, an energy function to consider transfer conductances and capacitors is derived. Then we recommend a voltage collapse criteria to predict the voltage collapse in power systems by using the energy margin derived by the proposed energy function. This energy function is applied to a 2-bus power system reflecting transfer conductances and capacitors. We show that the energy function derived based on vector product can be applied in order to analyze power system stability and the energy margin can be utilized as a criterion of voltage collapse by simulation for the 2-bus system.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1235-1243
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• 2015

This paper presents a modified Space Vector Pulse Width Modulation Technique (SVPWM), which solves the well-known problem of voltage imbalance in the capacitors of a single-phase multilevel inverter. The proposed solution is based on the measurement of DC voltage levels at each capacitor of the inverter DC bus. The measurements are then used to adjust the size of the active vectors within the SVPWM algorithm to keep the voltage waveform sinusoidal regardless of any voltage imbalance on the DC link capacitors. When a voltage deviation exceeds a predetermined hysteresis band, the correspondent voltage vector is restricted to restore the voltage level to an acceptable threshold. Hence, the need for external voltage regulators for the voltage capacitors is eliminated. The functionality of the proposed algorithm is successfully demonstrated through simulations and experiments on a grid tied application.

• Journal of Power Electronics
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• v.8 no.3
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• pp.275-279
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• 2008

An LLC series resonant converter has many unique characteristics and improvements over PWM topologies. However, many output capacitors are needed in parallel to satisfy output voltage ripple and the rated ripple current of the capacitors. This paper deals with a novel two phase interleaved LLC resonant converter using a phase of the resonant capacitor. The proposed converter can satisfy output voltage ripple and a rated ripple current of capacitors with few output capacitors, relatively. The operation and features are considered in detail and a prototype with a 12V-100A output is investigated.