• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.126-130
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• 1995

$CdS_{1-x}Te_{1-x}$ polycrystalline thin films were fabricated from CdS and CdTe powder by co-evaporation method at $10^{-6}$ Torr. The Optimum evaporation condition was substrate temperature $T_{s}$=$150^{\circ}C$, evaporation time t=30 min. XRD spectrums indicated that the crystal structure chanced from zinc blonde (x$\leq$0.22) to wurtzite (x$\geq$0.96) through mixed structure (0.22$\leq$0.74) as composition value x increase to CdS. Conductive type was n-type by hot point probe method. van der Pauw method was not applicable for x<0,5 due to high hall voltages, Electrical resistivity and Hall carrier mobility were decreased as x increase, while Hall carrier concentration was increased. The optical bandgap of $CdS_{1-x}Te_{1-x}$ polycrystalline thin films measure d at R.T. had quardratic form and the bowing parameter was fitted as 1.98eV for theoretical value of 2.0eV. I-V characteristics of In/CdTe/$CdS_{x}Te_{1-x}$Au Schottky diodes showed that CdS-rich one had better forward characteristics than CdTe-rich one.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.69-72
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• 2002

We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^{2}$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.1035-1038
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• 2002

The electrical properties of Porous polycrystalline silicon Nano-Structure (PNS) as a cold cathode were investigated as a function of anodizing condition, the thickness of Au film as a top electrode and the substrate temperature. Non-doped 2${\mu}m$-polycrystalline silicon was electrochemically anodized in HF: ethanol (=1:1) mixture as a function of the anodizing condition including a current density and anodizing time. After anodizing, the PNS was thermally oxidized for 1 hr at 900 $^{\circ}C$. Then, 20nm, 30nm, 45nm thickness of Au films as a top electrode were deposited by E-beam evaporator. Among the PNSs fabricated under the various kinds of anodizing conditions, the PNS anodized at a current density of 10mA/$cm^2$ for 20 sec has the lowest turn-on voltage and the highest emission current than those of others. Also, the electron emission properties were investigated as functions of measuring temperature and the different thickness of Au film as a top-electrode.

• Journal of Sensor Science and Technology
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• v.16 no.4
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• pp.259-262
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• 2007

This paper describes the electrical characteristics of polycrystalline (poly) 3C-SiC thin film diodes, in which poly 3C-SiC thin films on n-type and p-type Si wafers, respectively, were deposited by APCVD using HMDS, $H_{2}$, and Ar gas at $1150^{\circ}C$ for 3 hr. The schottky diode with Au/poly 3C-SiC/Si (n-type) structure was fabricated. Its threshold voltage ($V_{bi}$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_{D}$) value were measured as 0.84 V, over 140 V, 61 nm, and $2.7{\times}10^{19}cm^{-3}$, respectively. Moreover, for the good ohmic contact, Al/poly 3C-SiC/Si (n-type) structure was annealed at 300, 400, and $500^{\circ}C$, respectively for 30 min under the vacuum condition of $5.0{\times}10^{-6}$ Torr. Finally, the p-n junction diodes fabricated on the poly 3C-Si/Si (p-type) were obtained like characteristics of single 3CSiC p-n junction diode. Therefore, poly 3C-SiC thin film diodes will be suitable for microsensors in conjunction with Si fabrication technology.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1442-1444
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• 1995

In this study, we confirmed that the crystallinity and the mechanical properties of polycrystalline Silicon(poly-Si) deposited on the poly-oxide are better than those of poly-Si on the conventional sacrificial layers that is CVD oxide layer or PSG. But the etch rate of poly-oxide is poor than that of the CVD oxide layer or PSG. Therefore, to make the best use of small stress and fast etch rate, we fabricated the double oxide layer; 10%-thick poly-oxide on 90%-thick CVD oxide or PSG. To estimate structure deformation by stress, we fabricated the test structures; cantilever. bridge and ring/beam structure and estimated by SEM. As the results, all structure is expressed the deformed structure by residual stress(tensile stress) and the deformation of the structure layer on the double oxide layer is small compared with that of the structure layer on the CVD oxide layer or PSG. And, the etch rate of the double oxide layer is enhanced compared with that of the poly-oxide.

• Knowledge Management Research
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• v.12 no.1
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• pp.39-52
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• 2011

Many LCD manufacturers continue to develop the technologies of LCD manufacturing processes for the reduction of production cost, power consumption and high-resolution. The LTPS (Low Temperature Polycrystalline Silicon) crystallization technology is important for rearranging the internal structure of liquid crystal grain by adding certain energy to amorphous silicon and turning it into poly-silicon in order to manufacture LCD with better performance. We consider 14 existing technologies of LTPS crystallization in the LCD manufacturing and present an intelligent analysis methodology using patent map and AHP (Analytic Hierarchy Process) analysis for determining an optimal LTPS crystallization technology. By using patent map analysis, we easily understand the development process and mega-trend of LTPS crystallization technologies and their relationship. By using AHP analysis, we evaluate 14 LTPS technologies. Through the use of proposed methodology, we determine the Continuous Wave Laser Lateral Crystallization technology as an optimal one.

• Transactions on Electrical and Electronic Materials
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• v.3 no.2
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• pp.28-31
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• 2002

The Cdl-xZnxTe film was fabricated by thermal evaporation for the flat-panel X-ray detector. The stoichimetric ratio and the crystal structure of a polycrystalline Cd$_{1-x}$ Zn$_{x}$Te were investigated by EPMA and XRD, respectively. The leakage current and X-ray sensitivity of the fabricated films were measured to analyze the X-ray response characteristic of Zn in the polycrystalline CdZnTe thin film. The leakage current and the output charge density of Cd$_{0.7}$Zn$_{0.3}$Te thin film were measured to 0.37 nA/cm$^2$ and 260 pc/cm$^2$ at an applied voltage of 2.5 V/${\mu}{\textrm}{m}$, respectively. Experimental results showed that the increase of Zn doping rates in Cd$_{1-x}$ Zn$_{x}$Te detectors reduced the leakage current and improved the signal to noise ratio significantly.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.251-251
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• 2008

In this work, appropriate corrugated structure is suggested to increase resonant frequency of resonators. Micro beam resonators based on polycrystalline 3C-SiC films which have a two-side corrugation along the length of beams were simulated by finite element method and compared to a same - size flat rectangular. With the dimension of $36\times12\times0.5{\mu}m^3$, the flat cantilever has resonant frequency of 746 kHz. Meanwhile, with this size only corrugation width of $6{\mu}m$ and depth of $0.4{\mu}m$, the corrugated cantilever reaches the resonant frequency at 1.252 MHz, and is 68% larger than that of flat type.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.273-273
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• 2008

This paper describes the frequency response of two-port surface acoustic wave (SAW) resonator made of 002-polycrystalline aluminum nitride (AlN) thin film on 111-poly 3C-SiC buffer layer. In there, Polycrystalline AlN thin films were deposited on polycrystalline 3C-SiC buffer layer by pulsed reactive magnetron sputtering system, the polycrystalline 3C-SiC was grown on $SiO_2$/Si sample by CVD. The obtained results such as the temperature coefficient of frequency (TCF) of the device is about from 15.9 to 18.5 ppm/$^{\circ}C$, the change in resonance frequency is approximately linear (30-$150^{\circ}C$), which resonance frequency of AlN/3C-SiC structure has high temperature stability. The characteristics of AlN thin films grown on 3C-SiC buffer layer are also evaluated by using the XRD, and AFM images.