• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.71-77
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• 1996

Considering that polycrystalline silicon, a structural material of the micromachining, is affected by a sacrificial oxide layer, the poly-oxide obtained by the thermal oxidation of polycrystalline silicon is newly proposed and estimated as the sacrificial oxide layer. The grain size of the polycrystalline silicon grown on the poly-oxide is larger than that of poly crystalline silicon grown on the conventional sacrificial oxide layer. As a result of XRD, increase of (111) textures and formation of additional (220) textures are observed on the polycrystaIline silicon deposited on the poly-oxide. Also, the polycrystalline silicon grown on the poly-oxide represents small and uniform stress.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.96.2-96.2
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• 2010

The surface morphology and structural properties of polycrystalline silicon (poly-Si) films made in-situ aluminum induced crystallization at various substrate temperature (300~600) was investigated. Silicon films were deposited by hot-wire chemical vapor deposition (HWCVD), as the catalytic or pyrolytic decomposition of precursor gases SiH4 occurs only on the surface of the heated wire. Aluminum films were deposited by DC magnetron sputtering at room temperature. continuous poly-Si films were achieved at low temperature. from cross-section TEM analyses, It was confirmed that poly-Si above $450^{\circ}C$ was successfully grown on and poly-Si films had (111) preferred orientation. As substrate temperature increases, Si(111)/Si(220) ratio was decreased. The electrical properties of poly-Si film were investigated by Hall effect measurement. Poly-Si film was p-type by Al and resistivity and hall effect mobility was affected by substrate temperature.

• Journal of the Korean institute of surface engineering
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• v.43 no.1
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.1-4
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• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1329-1333
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• 2018

We investigated the mechanism of mobility enhancement after the dehydrogenation process in polycrystalline silicon (poly-Si) thin films. The dehydrogenation process was performed by using an in-situ CVD chamber in a $N_2$ ambient or an ex-situ furnace in air ambient. We observed that the dehydrogenated poly-Si in a $N_2$ ambient had a lower oxygen concentration than the dehydrogenated poly-Si annealed in an air ambient. The in-situ dehydrogenation increased the (111) preferred orientation of poly-Si and reduced the oxygen concentration in poly-Si thin films, leading to a reduction of the trap density near the valence band. This phenomenon gave rise to an increase of the field-effect mobility of the poly-Si thin film transistor.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.7
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• Korean Journal of Materials Research
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• v.18 no.9
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• pp.507-510
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• 2008

Electrical properties of multi-channel metal-induced unilaterally precrystallized polycrystalline silicon thin-film transistor (MIUP poly-Si TFT) devices and circuits were investigated. Although their structure was integrated into small area, reducing annealing process time for fuller crystallization than that of conventional crystal filtered MIUP poly-Si TFTs, the multi-channel MIUP poly-Si TFTs showed the effect of crystal filtering. The multi-channel MIUP poly-Si TFTs showed a higher carrier mobility of more than 1.5 times that of the conventional MIUP poly-Si TFTs. Moreover, PMOS inverters consisting of the multi-channel MIUP poly-Si TFTs showed high dynamic performance compared with inverters consisting of the conventional MIUP poly-Si TFTs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05a
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• pp.173-176
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• 2004

In this study we investigated post ELA(Excimer Laser Annealing) effect on SMC (Silicide Mediated Crystalization) poly-Si (Polycrystalline Silicon) to improve the characteristics of poly-Si. Combining SMC and XeCl ELA were used to crystallize the a-Si (amorphous Silicon) at various ELA energy density for LTPS (Low Temperature Polycrystalline Silicon). We fabricated the conventional SMC poly-Si with no SPC (Solid Phase Crystallization) phase using UV heating method[1] and irradiated excimer laser on SMC poly-Si, so called SMC-ELA poly-Si. After using post ELA we can get better surface morphology than conventional ELA poly-Si and enhance characteristics of SMC poly-Si. We also observed the threshold energy density regime in SMC-ELA poly-Si like conventional ELA poly-Si.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.250-253
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• 2009

Effective methods for monitoring the quality of polycrystalline silicon (poly-Si) films are discussed. Raman spectroscopy is typically used to determine crystallinity of poly-Si, but this method has limitations for data gathering on large substrates for mass production of poly-Si TFT backplanes. Spectroscopic ellipsometry is proposed as an alternative for fast and simple estimation of poly-Si quality on large substrates. By using both ellipsometry and Raman spectroscopy, it is possible to determine whether the quality and uniformity of the poly-Si films meet the criteria required for mass production of TFT backplanes for AMOLED panels.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.67-68
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• 2000

Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.