• 제목/요약/키워드: Photolithography Processes

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Hybrid Imprint Lithography 공정을 이용한 3D 구조물 제작 (Fabrication of 3-D structures using hybrid imprint lithography)

  • 신상현;김한형;양승국;이종근;오범환;이승걸;이일항;박세근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.509-510
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    • 2008
  • Hybrid Imprint Lithography (HIL) is proposed where photolithography and imprinting processes are employed. Fabrication step of multilevel or three dimensional patterns is suggested. The method of controlling residual layer thickness after imprinting is developed. The thickness of residual layer changes lineally with imprinting time and can be controlled. Polymer patterns fabricated by this HIL is demonstrated.

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Novel Backplane for AM-OLED Device

  • Sung, Myeon-Chang;Lee, Ho-Nyun;Kim, Chang Nam;Kang, Sun Kil;Kim, Do Youl;Kim, Seong-Joong;Kim, Sang-Kyoon;Kim, Sung-Kab;Kim, Hong-Gyu;Kim, Sung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.133-136
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    • 2007
  • IGZO TFTs were fabricated by conventional photolithography and wet-etching processes on metal substrates for the flexible display. The characteristics of TFTs on metal substrates were comparable to those of TFTs on glass substrates. Moreover, AM-OLED panels based on IGZO TFT arrays on metal substrates were successfully driven, for the first time.

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Full 3D Level Set Simulation of Nanodot Fabrication using FIBs

  • Kim, Heung-Bae
    • Applied Science and Convergence Technology
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    • 제25권5호
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    • pp.98-102
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    • 2016
  • The level set method has recently become popular in the simulation of semiconductor processes such as etching, deposition and photolithography, as it is a highly robust and accurate computational technique for tracking moving interfaces. In this research, full three-dimensional level set simulation has been developed for the investigation of focused ion beam processing. Especially, focused ion beam induced nanodot formation was investigated with the consideration of three-dimensional distribution of redeposition particles which were obtained by Monte-Carlo simulation. Experimental validations were carried out with the nanodots that were fabricated using focused $Ga^+$ beams on Silicon substrate. Detailed description of level set simulation and characteristics of nanodot formation will be discussed in detail as well as surface propagation under focused ion beam bombardment.

표면 반응 제어를 통한 영역 선택적 원자층 증착법 연구 동향 (Area selective atomic layer deposition via surface reaction engineering: a review)

  • 고은총;안지상;한정환
    • 한국표면공학회지
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    • 제55권6호
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    • pp.328-341
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    • 2022
  • Area selective atomic layer deposition (AS-ALD) is a bottom-up nanopattern fabrication method that can grow the ALD films only on the desired substrate areas without using photolithography and etching processes. Particularly, AS-ALD has attracted great attention in the semiconductor manufacturing process due to its advantage in reducing edge placement error by fabricating self-aligned patterns. In this paper, the basic principles and characteristics of AS-ALD are described. In addition, various approaches for achieving AS-ALD with excellent selectivity were comprehensively reviewed. Finally, the technology development to overcome the selectivity limit of AS-ALD was introduced along with future prospects.

DLC 박막 및 리소그래피 공정을 적용한 트라이볼러지 특성 연구 (Research on Tribology Characteristics Using DLC Thin Film and Lithography Processes)

  • 장태환;박진혁;김태규
    • 열처리공학회지
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    • 제36권6호
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    • pp.412-421
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    • 2023
  • As the demand for mechatronic systems and high performance increases in the machinery industry, the importance of improving friction characteristics is emphasized. During relative movement of objects, friction and wear occur on two surfaces in contact, and various methods are being designed to increase the lifespan and energy efficiency of machines. The energy increase effect using lubricants is a well-known method. In this study, a micro-sized rectangular grid pattern was produced by applying a precise micro-pattern photo lithography process. Rectangular grid patterns of the same shape and friction behavior according to the size of the pattern were produced in convex and concave shapes, and the tribological characteristics of each were analyzed.

Hollow Structure에서의 희생층 평탄화 제작 공정 (The Fabrication Processes for the Planarization of Sacrificial Layers over Hollow Structures)

  • 윤용섭;배기덕;최형;전찬봉;노광춘
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권10호
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    • pp.546-550
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    • 2004
  • Two fabrication approaches are proposed to planarize the sacrificial layer over hollow structures. One is the photoresist filling method that makes use of photolithography, thermal curing and plasma ashing. The other is the lamination method that is applying pressure and temperature to the organic film over the hollow structures. The fabrication results are compared with those of CMP process. Trenches and cavities with various dimensions have been made for the porposed process. Upon measuring the planarization levels, they are dependent on planarization methods and the geometrical size of hollow structures. The photoresist filling method is so strongly dependent on the width and depth of trenches that we have problems to use it for large dimensional trenches. To the contrary, the flatness of sacrificial layer over the trenches was found to be almost independent of trench dimensions for the lamination method. A CMP process shows the most excellent results, but the fabrication is complicated and the access to it is not so easy. It is important to choose the proper planarization method by considering the required flatness levels, materials to be planarized, and connection between the planarization step and the previous or the following process of it.

전사방법을 이용한 폴리머 필름에 내재된 실리콘 나노구조물 어레이 제작 (Fabrication of a Silicon Nanostructure Array Embedded in a Polymer Film by using a Transfer Method)

  • 신호철;이동기;조영학
    • 한국생산제조학회지
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    • 제25권1호
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    • pp.62-67
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    • 2016
  • This paper presents a silicon nanostructure array embedded in a polymer film. The silicon nanostructure array was fabricated by using basic microelectromechanical systems (MEMS) processes such as photolithography, reactive ion etching, and anisotropic KOH wet etching. The fabricated silicon nanostructure array was transferred into polymer substrates such as polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), and polycarbonate (PC) through the hot-embossing process. In order to determine the transfer conditions under which the silicon nanostructures do not fracture, hot-embossing experiments were performed at various temperatures, pressures, and pressing times. Transfer was successfully achieved with a pressure of 1 MPa and a temperature higher than the transition temperature for the three types of polymer substrates. The transferred silicon nanostructure array was electrically evaluated through measurements with a semiconductor parameter analyzer (SPA).

Design, Fabrication, and Testing of a MEMS Microturbine

  • Jeon Byung Sun;Park Kun Joong;Song Seung Jin;Joo Young Chang;Min Kyoung Doug
    • Journal of Mechanical Science and Technology
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    • 제19권2호
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    • pp.682-691
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    • 2005
  • This paper describes the design, fabrication, and testing of a microturbine developed at Seoul National University. Here, the term 'microturbine' refers to a radial turbine with a diameter on the order of a centimeter. Such devices can be used to transmit power for various systems. The turbine is designed using a commercial CFD code, and it has a design flow coefficient of 0.238 and work coefficient of 0.542. It has 31 stator blades and 24 rotor blades. A hydrodynamic journal bearing and hydrostatic thrust bearings counteract radial and axial forces on the rotor. The test turbine consists of a stack of five wafers and is fabricated by MEMS technology, using photolithography, DRIE, and bonding processes. The first, second, fourth, and fifth layers contain plumbing, and hydrostatic axial thrust bearings for the turbine. The third wafer contains the turbine's stator, rotor, and hydrodynamic journal bearings. Furthermore, a turbine test facility containing a flow control system and instrumentation has been designed and constructed. In performance tests, a maximum rotation speed of 11,400 rpm and flow rate of 16,000 sccm have been achieved.

AlGaAs/GaAs HBT의 제작과 특성연구 (Fabrication and Characterization of AlGaAs/GaAs HBT)

  • 박성호;최인훈;오응기;최성우;박문평;윤형섭;이해권;박철순;박형무
    • 전자공학회논문지A
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    • 제31A권9호
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    • pp.104-113
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    • 1994
  • We have fabricated n-p-n HBTs using 3-inchAlgaAs/GaAs hetero structure epi-wafers grown by MBE. DC and AC characteristics of HBT devices were measured and analyzed. For HBT epi-structure, Al composition of emitter was graded in the region between emitter cap and emitter. And base layer was designed with concentration of 1${\times}10^{19}/cm^{3}$ and thickness of 50nm, and Be was used as the p-type dopant. Principal processes for device fabrication consist of photolithography using i-line stepper, wet mesa etching, and lift-off of each ohmic metal. The PECVD SiN film was used as the inslator for the metal interconnection. HBT device with emitter size of 3${\times}10{\mu}m^{2}$ resulted in cut-off frequency of 35GHz, maximum oscillation frequency of 21GHz, and current gain of 60. The distribution of the ideality factor of collector and base current was very uniform, and the average values of off-set voltage and current was very uniform, and the average values of off-set voltage and current gain were 0.32V and 32 within a 3-inch wafer.

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미세접촉프린팅공정을 이용한 플렉시블 디스플레이 유기박막구동소자 제작 (Fabrication of Organic Thin Film Transistor(OTFT) for Flexible Display by using Microcontact Printing Process)

  • 김광영;조정대;김동수;이제훈;이응숙
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2006년도 춘계학술대회 논문집
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    • pp.595-596
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    • 2006
  • The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

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