• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.85-88
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• 2000

In order to resolve problems according to the phase error in QPSK demodulator of the digital communication systems. The demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in filter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table , We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is 175㎼, NCO with the proposed structure is 24.65㎼. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.81-84
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• 2000

This paper has been studied the design of 16-QAM demodulator used in broadband wireless local loop subscriber station. In B-WLL systems, transmission signal experience the inter symbol interference(ISI) due to multipath, frequency offset of RF/IF local oscillator and phase offset. In this paper, we discuss the effective data recovery algorithm for 16-QAM demodulator to compensate the distorted signal from ISI, frequency offset and phase offset.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.194-200
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• 2003

In this paper, FSK(Frequency Shift Keying) demodulator which is widely used for FH-SS system is designed and the experimental results are analyzed. The performance of the ADPLL(All-digital Phase-Locked-Loop), which is the main part of the demodulator circuit, is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the ADPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. There is about 2${\mu}\textrm{s}$ difference in time constant of the PLL. This difference is not critical in the demodulator. And the experimental results show that the transmitted data is well demodulated when the phase difference between the FSK modulated signal and the reference signal is about 180 degree.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.8
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• pp.770-776
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• 2009

We propose and demonstrate an I/Q demodulator using four-port BPSK demodulator base on additive mixing and reflection-type phase shifter using hybrid technique. Previously, the conventional I/Q demodulator base on multiplicative or additive mixing method divides I/Q signal path from mixer to parallel-to-serial converter. In this paper, we propose new I/Q demodulator without dividing I/Q baseband signal path. The proposed schematic requires half size in implementation and half power consumption in baseband path compared with the conventional receiver. Also, the proposed receiver eliminates parallel-to-serial converter after data decoding. The proposed circuit has been successfully demodulated a QPSK signal with the L-band carrier frequency and 20 Mbps data rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11B
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• pp.1565-1573
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• 2001

In order to resolve problems according to the phase error in QPSK demodulator in the digital satellite broadcasting, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the drawback of NCO of the conventional carrier recovery loop is to wastes a amount of power for the structure of Look-up table , we designed the structure of combinational logic without the Look-up table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the Look-up table is 175[${\mu}$W], NCO with the proposed structure is 24.65[${\mu}$W]. As the result, it is recognized that loss power is reduced about one eighth. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• Proceedings of the KOSOMBE Conference
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• v.1995 no.05
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• pp.167-170
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• 1995

A quadrature-channel MODEM using amplitude modulation was constructed. To test the MODEM, 6.4 MHz sinusoidal wave 1 KHz triangular wave were modulated, then the modulated signal was fed into the demodulator, to reconstruct the triangular wave.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.256-261
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• 2011

We demonstrate 3-Gb/s wireless link using a 60-GHz receiver front-end fabricated in $0.25-{\mu}m$ SiGe:C bipolar complementary metal oxide semiconductor (BiCMOS) and a mixed-mode quadrature phase-shift keying (QPSK) demodulator fabricated in 60-nm CMOS. The 60-GHz receiver consists of a low-noise amplifier and a down-conversion mixer. It has the peak conversion gain of 16 dB at 62 GHz and the 3-dB intermediate-frequency bandwidth of 6 GHz. The demodulator using 1-bit sampling scheme can demodulate up to 4.8-Gb/s QPSK signals. We achieve successful transmission of 3-Gb/s data in 60 GHz through 2-m wireless link.

• Journal of Communications and Networks
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• v.12 no.6
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• pp.529-532
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• 2010

Multi-carrier demultiplexer/demodulator (MCDD) in an on-board processing (OBP) satellite used for digital multimedia services has two typical architectures according to the channel demultiplexing procedure: Multistage multi-carrier demultiplexer (M-MCD) or poly-phase fast Fourier transform (PPF). During the channel demultiplexing, phase and quantization errors influence the performance of MCDD; those errors affect the bit error rate (BER) performance of M-MCD and PPF differently. In this paper, we derive the phase error variances that satisfy the condition that M-MCD and PPF have the same signal to noise ratio according to quantization bits, and then, with these results, analyze the BER performances of M-MCD and PPF. The results provided here may be a useful reference for the selection of M-MCD or PPF in designing the MCDD in an OBP satellite communications system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.10 s.89
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• pp.952-960
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• 2004

PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.773-778
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• 2007

In order to resolve problems with the phase error in QPSK demodulator of the digital satellite broadcasting systems, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in Inter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is $175{\mu}W$, NCO with the proposed structure is $24.65{\mu}W$. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.