• Kyungpook Mathematical Journal
• /
• v.56 no.1
• /
• pp.185-220
• /
• 2016

We study the Gauss and Poisson semigroups connected with the Riemann-Liouville operator defined on the half plane. Next, we establish a principle of maximum for the singular partial differential operator $${\Delta}_{\alpha}={\frac{{\partial}^2}{{\partial}r^2}+{\frac{2{\alpha}+1}{r}{\frac{\partial}{{\partial}r}}+{\frac{{\partial}^2}{{\partial}x^2}}+{\frac{{\partial}^2}{{\partial}t^2}}};\;(r,x,t){\in}]0,+{\infty}[{\times}{\mathbb{R}}{\times}]0,+{\infty}[$$. Later, we define the Littlewood-Paley g-function and using the principle of maximum, we prove that for every $p{\in}]1,+{\infty}[$, there exists a positive constant $C_p$ such that for every $f{\in}L^p(d{\nu}_{\alpha})$, $${\frac{1}{C_p}}{\parallel}f{\parallel}_{p,{\nu}_{\alpha}}{\leqslant}{\parallel}g(f){\parallel}_{p,{\nu}_{\alpha}}{\leqslant}C_p{\parallel}f{\parallel}_{p,{\nu}_{\alpha}}$$.

• East Asian mathematical journal
• /
• v.19 no.1
• /
• pp.73-80
• /
• 2003

Let D be a bounded domain in $\mathbb{C}^n$ with $C^2$ boundary. In this paper, we prove the following inequality $${\parallel}u{\parallel}_{p_2,{\alpha}_2}{\lesssim}{\parallel}u{\parallel}_{p_1,{\alpha}_1}+{\parallel}\bar{\partial}u{\parallel}_{p_1,{\alpha}_1+p_1}/2$$, where $1{\leq}p_1{\leq}p_2<\infty,\;{\alpha}_j>0,(n+{\alpha}_1)/p_1=(n+{\alpha}_1)/p_1=(n+{\alpha}_2)/p_2$, and $1/p_2{\geq}1/p_1-1/2n$.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.31B no.10
• /
• pp.67-72
• /
• 1994

In this paper we suggest a 32 bit high speed parallel multiplier which plays an important role in digital signal processing. We employ a bit-pair recoding Booth algoritham that gurantees n/2 partial product terms, which uniformly handles the signed-operand case. While partial product terms are generated, a special method is suggested to reduce time delay by employing 1's complement instead of 2's complement. Later when partial products are added, the additional 1 bit's are packed in a single partial product term and added to in the parallel counter. Then 16 partial product terms are reduced to two summands by using successive parallel counters. Final multiplication value is obtained by a BLC adder. When this multiplier is simulated under 0.8$\mu$CMOS standard cell we obtain 30ns multiplier speed.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.4 no.4
• /
• pp.278-285
• /
• 2011

This paper makes an analysis of the encoding structure and the decoding algorithm proposed by the DVB-S2 specification. The methods of implementing the LDPC decoder are fully serial decoder, the partially parallel decoder and the fully parallel decoder. The partial parallel scheme is the efficient selection to achieve appropriate trade-offs between hardware complexity and decoding speed. Therefore, this paper proposed an efficient memory structure for check node update block, bit node update block, and LLR memory.

• The KIPS Transactions:PartA
• /
• v.10A no.6
• /
• pp.671-676
• /
• 2003

In this paper, we proposed a new First Partial product Addition (FPA) architecture with new compressor (or parallel counter) to CSA tree built in the process of adding partial product for improving speed in the fast parallel multiplier to improve the speed of calculating partial product by about 20% compared with existing parallel counter using full Adder. The new circuit reduces the CLA bit finding final sum by N/2 using the novel FPA architecture. A 5.14nS of multiplication speed of the $16{\times}16$ multiplier is obtained using $0.25\mu\textrm{m}$ CMOS technology. The architecture of the multiplier is easily opted for pipeline design and demonstrates high speed performance.

• Honam Mathematical Journal
• /
• v.37 no.3
• /
• pp.299-315
• /
• 2015

In this paper, we study the first-order system least-squares (FOSLS) spectral method for parabolic partial differential equations. There were lots of least-squares approaches to solve elliptic partial differential equations using finite element approximation. Also, some approaches using spectral methods have been studied in recent. In order to solve the parabolic partial differential equations in parallel, we consider a parallel numerical method based on a hybrid method of the frequency-domain method and first-order system least-squares method. First, we transform the parabolic problem in the space-time domain to the elliptic problems in the space-frequency domain. Second, we solve each elliptic problem in parallel for some frequencies using the first-order system least-squares method. And then we take the discrete inverse Fourier transforms in order to obtain the approximate solution in the space-time domain. We will introduce such a hybrid method and then present a numerical experiment.

• Journal of Communications and Networks
• /
• v.5 no.1
• /
• pp.1-6
• /
• 2003

In this paper, we extend the derivation of the iterative soft-output Viterbi algorithm (SOVA) for partial response (PR) channels, and modify its decoding process such that it works consistently for arbitrary high code rates, e.g., rate 64/65. We show that the modified SOVA always outperforms the conventional SOVA that appears in the literature with a significant difference for high code rates. It also offers a significant cut down in the trace-back computations. We further examine its performance for parallel and serial concatenated codes on a precoded Class IC partial response (PR4) channel. Code rates of the form $\frac{k_0}{k_0+1}$($k_0$ = 4, 8, and 64) are considered. Our simulations indicate that the loss suffered by the modified SOVA, relative to the APP algorithm, is consistent for all code rates and is at most 1.2 dB for parallel concatenations and at most 1.6 dB for serial concatenations at $P_b$ = $10^{-5}$.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.3
• /
• pp.50-58
• /
• 2013

In this paper, parallel decimal fixed-point multiplier which uses the limited range of Singed-Digit number encoding and the reduction step is proposed. The partial products are generated without carry propagation delay by encoding a multiplicand and a multiplier to the limited range of SD number. With the limited range of SD number, the proposed multiplier can improve the partial product reduction step by increasing the number of possible operands for multi-operand SD addition. In order to estimate the proposed parallel decimal multiplier, synthesis is implemented using Design Compiler with SMIC 180nm CMOS technology library. Synthesis results show that the delay of proposed parallel decimal multiplier is reduced by 4.3% and the area by 5.3%, compared to the existing SD parallel decimal multiplier. Despite of the slightly increased delay and area of partial product generation step, the total delay and area are reduced since the partial product reduction step takes the most proportion.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.6A
• /
• pp.929-938
• /
• 2001

CDMA 2000 1X EV.(HDR, 1XTREME, LAS-CDMA)에서는 고속데이터 전송을 위한 변조방식으로 M-ary QAM을 제안하고 있다. 그러나, M-ary QAM을 사용한 DS-CDMA 시스템은 고속 데이터 전송이 가능한 반면에 M-ary 수가 증가할수록 잡음(AWGN)과 타 사용자에 의한 다중접속간섭(MAI)의 영향이 커져 비트에러율(BER)이 증가하고 채널용량이 급격히 줄어드는 문제점이 있다. 따라서, DS-CDMA/M-ary QAM 시스템에서 많은 사용자에게 고속의 데이터 서비스를 제공하기 위해서는 잡음을 줄이거나 MAI를 경감시킬 수 있는 성능 개선 기법이 요구된다. 본 논문에서는 성능 개선 기법으로서 다단병렬간섭제거기(MPIC : Multistage Parallel Interference Canceller)와 부분 다단병렬간섭제거기(partial MPIC)를 채용한 비동기 DS-CDMA/M-ary QAM 시스템의 성능 개선을 이론적으로 분석하고 이를 검증하기 위한 컴퓨터 시뮬레이션을 수행하였다. 결과에서, MPIC와 partial MPIC를 채용함으로써 4 QAM, 16 QAM 및 64 QAM을 사용한 DS-CDMA 시스템의 BER과 채널용량이 크게 개선됨을 확인하였다. MPIC를 채용한 경우는 AWGN 채널의 BER에 근접하였다. 또한, MPIC는 partial MPIC보다 BER 성능이 우수하였으며 더 많은 채널용량 개선을 달성하였다. 그러나, MPIC는 partial MPIC 보다 계산량이 훨씬 많고 복잡한 구조를 갖기 때문에 실제 시스템 구현에 있어서 성능과 복잡도 사이에 타협(tradeoff)이 필요하다.

• Bulletin of the Korean Mathematical Society
• /
• v.51 no.1
• /
• pp.189-206
• /
• 2014

In this paper, we prove the global existence and uniqueness of the dissipative Kirchhoff equation $$u_{tt}-M({\parallel}{\nabla}u{\parallel}^2){\triangle}u+{\alpha}u_t+f(u)=0\;in\;{\Omega}{\times}[0,{\infty}),\\u(x,t)=0\;on\;{\Gamma}_1{\times}[0,{\infty}),\\{\frac{{\partial}u}{\partial{\nu}}}+g(u_t)=0\;on\;{\Gamma}_0{\times}[0,{\infty}),\\u(x,0)=u_0,u_t(x,0)=u_1\;in\;{\Omega}$$ with nonlinear boundary damping by Galerkin approximation benefited from the ideas of Zhang et al. [33]. Furthermore,we overcome some difficulties due to the presence of nonlinear terms $M({\parallel}{\nabla}u{\parallel}^2)$ and $g(u_t)$ by introducing a new variables and we can transform the boundary value problem into an equivalent one with zero initial data by argument of compacity and monotonicity.