• ETRI Journal
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• v.26 no.5
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• pp.432-436
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• 2004

In this paper, we propose the modified uniformly most powerful (UMP) belief-propagation (BP)-based decoding algorithm which utilizes multiplicative and additive factors to diminish the errors introduced by the approximation of the soft values given by a previously proposed UMP BP-based algorithm. This modified UMP BP-based algorithm shows better performance than that of the normalized UMP BP-based algorithm, i.e., it has an error performance closer to BP than that of the normalized UMP BP-based algorithm on the additive white Gaussian noise channel for low density parity check codes. Also, this algorithm has the same complexity in its implementation as the normalized UMP BP-based algorithm.

• ETRI Journal
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• v.37 no.4
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• pp.736-742
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• 2015

A serial concatenated decoding algorithm with dynamic threshold is proposed for low-density parity-check codes with short and medium code lengths. The proposed approach uses a dynamic threshold to select a decoding result from belief propagation decoding and order statistic decoding, which improves the performance of the decoder at a negligible cost. Simulation results show that, under a high SNR region, the proposed concatenated decoder performs better than a serial concatenated decoder without threshold with an Eb/N0 gain of above 0.1 dB.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.1
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• pp.117-124
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• 2012

In this paper, we propose a simple H parity check matrix from the CPM(circulant permutation matrix), which can easily avoid the cycle-4, and approach to flexible code rates and lengths. As a result, the operations of the submatrices will become the multiplications between several CPMs, the calculations of the LDPC(low density parity check) encoding could be simplest. Also we consider the fast encoding problem for LDPC codes. The proposed constructions could lead to fast encoding based on the simplest matrices operations for both regular and irregular LDPC codes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11C
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• pp.1030-1036
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• 2006

In this paper, we present two methods of correcting bit errors in constant amplitude multi-code (CAMC) CDMA, which uses the redundant bits only. The first method is a parity-based bit correction with hard-decision, where the received signals despread into n two-dimensional structure with both horizontal parity and vertical parity. Then, an erroneous bit is corrected for each $4{\times}4$ pattern. The second method is a turbo decoding, which is modified from the decoding of a single parity check product code (SPCPC). Experimental results show that, in the second method, the redundant bits in CAMC can be fully used for the error correction and so they are not really a loss of channel bandwidth. Hence, CAMC provides both a low peak-to-average power ratio and robustness to bit errors.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.4
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• pp.1987-2001
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• 2017

Low-density parity-check (LDPC) codes have attracted a great attention because of their excellent error correction capability with reasonably low decoding complexity. Among decoding algorithms for LDPC codes, the min-sum (MS) algorithm and its modified versions have been widely adopted due to their high efficiency in hardware implementation. In this paper, a self-adaptive MS algorithm using the difference of the first two minima is proposed for faster decoding speed and lower power consumption. Finding the first two minima is an important operation when MS-based LDPC decoders are implemented in hardware, and the found minima are often compressed using the difference of the two values to reduce interconnection complexity and memory usage. It is found that, when these difference values are bounded, decoding is not successfully terminated. Thus, the proposed method dynamically decides whether the termination-checking step will be carried out based on the difference in the two found minima. The simulation results show that the decoding speed is improved by 7%, and the power consumption is reduced by 16.34% by skipping unnecessary steps in the unsuccessful iteration without any loss in error correction performance. In addition, the synthesis results show that the hardware overhead for the proposed method is negligible.

• Journal of Communications and Networks
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• v.17 no.3
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• pp.213-220
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• 2015

In this paper, we present a reliability-based iterative proportionality-logic decoding algorithm for two classes of structured low-density parity-check (LDPC) codes. The main contributions of this paper include: 1) Syndrome messages instead of extrinsic messages are processed and exchanged between variable nodes and check nodes, which can reduce the decoding complexity; 2) a more flexible decision mechanism is developed in which the decision threshold can be self-adjusted during the iterative process. Such decision mechanism is particularly effective for decoding the majority-logic decodable codes; 3) only part of the variable nodes satisfying the pre-designed criterion are involved for the presented algorithm, which is in the proportionality-logic sense and can further reduce the computational complexity. Simulation results show that, when combined with factor correction techniques and appropriate proportionality parameter, the presented algorithm performs well and can achieve fast decoding convergence rate while maintaining relative low decoding complexity, especially for small quantized levels (3-4 bits). The presented algorithm provides a candidate for those application scenarios where the memory load and the energy consumption are extremely constrained.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.2
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• pp.1-5
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• 2008

Although we can make a sparse matrices for LDPC codes, the encoding complexity per a block increases quadratically by $n^2$. We propose modified PEG algorithm using PEG algorithm having a large girth by establishing edges or connections between symbol and check nodes in an edge-by-edge manner. M-PEG construct parity check matrices. So we propose parity check matrices H form a dual-diagonal matrices that can construct a more efficient decoder using a M-PEG(modified Progressive Edge Growth).

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1262-1270
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• 2017

Among various decoding algorithms of low-density parity-check (LDPC) codes, the min-sum (MS) algorithm and its modified algorithms are widely adopted because of their computational simplicity compared to the sum-product (SP) algorithm with slight loss of decoding performance. In the MS algorithm, the magnitude of the output message from a check node (CN) processing unit is decided by either the smallest or the next smallest input message which are denoted as min1 and min2, respectively. It has been shown that multiplying a scaling factor to the output of CN message will improve the decoding performance. Further, Zhong et al. have shown that multiplying different scaling factors (called a 2-dimensional scaling) to min1 and min2 much increases the performance of the LDPC decoder. In this paper, the simplified 2-dimensional scaled (S2DS) MS algorithm is proposed. In the proposed algorithm, we figure out a pair of the most efficient scaling factors which multiplications can be replaced with combinations of addition and shift operations. Furthermore, one scaling operation is approximated by the difference between min1 and min2. The simulation results show that S2DS achieves the error correcting performance which is close to or outperforms the SP algorithm regardless of coding rates, and its computational complexity is the lowest comparing to modified versions of MS algorithms.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5A
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• pp.436-444
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• 2005

Unitary matrix modulation (UMM) is investigated in multiple antennas system that is called unitary space-time modulation (USTM). In an OFDM, the diagonal components of UMM with splitting over the coherence bandwidth (UMM-S/OFDM) have been proposed. Recently LDPC code is strongly attended and studied due to simple decoding property with good error correction property. In this paper, we propose LDPC coded UMM-S/OFDM for increasing the system performance. Our proposed system can obtain frequency diversity using UMM-S/OFDM like USTM/OFDM, and large coding gain using LDPC code. The superior characteristics of the proposed UMM-S/OFDM are demonstrated by extensive computer simulations in multi-path Rayleigh fading channel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.801-809
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• 2007

LDPC Low Density Parity Check) code, which is an error correcting code determined to be applied to the 4th generation mobile communication systems, requires a heavy computational complexity due to iterative decodings to achieve a high BER performance. This paper proposes an algorithm to reduce the number of decoding iterations to increase performance of the decoder in decoding latency and power consumption. Measuring changes between the current decoded LLR values and previous ones, the proposed algorithm predicts directions of the value changes. Based on the prediction, the algorithm inverts the sign bits of the LLR values to speed up convergence, which means parity check equation is satisfied. Simulation results show that the number of iterations has been reduced by about 33% without BER performance degradation in the proposed decoder, and the power consumption has also been decreased in proportional to the amount of the reduced decoding iterations.