Browse > Article

Design of a Low-Power LDPC Decoder by Reducing Decoding Iterations  

Lee, Jun-Ho (서강대학교 전자공학과 대학원 CAD & ES연구실)
Park, Chang-Soo (서강대학교 전자공학과 대학원 CAD & ES연구실)
Hwang, Sun-Young (서강대학교 전자공학과 대학원 CAD & ES연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.32, no.9C, 2007 , pp. 801-809 More about this Journal
Abstract
LDPC Low Density Parity Check) code, which is an error correcting code determined to be applied to the 4th generation mobile communication systems, requires a heavy computational complexity due to iterative decodings to achieve a high BER performance. This paper proposes an algorithm to reduce the number of decoding iterations to increase performance of the decoder in decoding latency and power consumption. Measuring changes between the current decoded LLR values and previous ones, the proposed algorithm predicts directions of the value changes. Based on the prediction, the algorithm inverts the sign bits of the LLR values to speed up convergence, which means parity check equation is satisfied. Simulation results show that the number of iterations has been reduced by about 33% without BER performance degradation in the proposed decoder, and the power consumption has also been decreased in proportional to the amount of the reduced decoding iterations.
Keywords
Low-Density Parity-Check (LDPC) codes; iterative decoding; low power algorithm;
Citations & Related Records
연도 인용수 순위
  • Reference
1 T. Richardson and R. Urbanke, 'The Renaissance of Gallager's Low-Density Parity-Check Codes,' IEEE Communication Magazine, vol. 41, no. 8, pp. 126 131, Aug. 2003
2 V. Zyablov and M. Pinsker, 'Estimation of the Error Correction Complexity of Gallager Low Density Parity Codes,' Problems of Information Transmission, vol. 11, no. 1, pp. 23-26, Jan. 1976
3 N. Wiberg, H. Loeliger, and R. Kotter, 'Codes and Iterative Decoding on General Graphs,' in Proc. Information Theory, pp. 468, Sep. 1995
4 F. Kshischang and B. Frey, 'Iterative Decoding of Compound Codes by Probability Propagation in Graphical Models,' IEEE Journal on Selected Area in Communications, vol. 16, no. 2, pp. 219-230, Feb. 1998   DOI   ScienceOn
5 R. Tanner, 'A Recursive Approach to Low Complexity Codes,' IEEE Trans. Inform. Theory, vol. 27, no. 5, pp. 533-547, Sep. 1981   DOI
6 R. Morelos-Zaragoza, The Art of Error Correcting Coding. Wiley: New York, 2002
7 V. Sorokine, F. Kschischang, and S. Pasupathy, 'Gallager Codes for CDMA Applications - Part II: Implementations, Complexity, and System Capacity,' IEEE Trans. Communications, vol. 48, no. 11, pp. 1818-1828, Oct. 2000   DOI   ScienceOn
8 T. Richardson and R. Urbanke, 'The Capacity of Low-density Parity-check Codes under Message-passing,' IEEE Trans. Inform. Theory, vol. 47, no. 2, pp. 599-618, Feb. 2001   DOI   ScienceOn
9 황승구, '4세대 이동통신 무선 전송 기술 동향,' 주간기술동향, 통권 1168호, 2004년 10월
10 B. Sklar, Digital Communications: Fundamental and Applications. 2nd Edition, Prentice Hall Inc.,: New Jersey, 2001
11 J. Fan, Constrained Coding and Soft Iterative Decoding. Kluwer Academic Pub.: Norwell, MA, 2001
12 D. MacKay and R. Neal, 'Near Shannon Limit Performance of Low Density Parity Check Codes,' IEE Electronics Letters, vol. 32, no. 18, pp. 1645-1646, Aug. 1996   DOI   ScienceOn
13 R. Gallager, 'Low-Density Parity-Check Codes,' IRE Trans. Inform. Theory, vol. IT-8, pp. 21-28, Jan. 1962
14 A. Blankby and C. Howland, 'A 690-mW 1-Gb/s 1024-b, Rate-1/2 Low-Density Parity-Check Code Decoder,' IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 404-412, Mar. 2002   DOI   ScienceOn
15 D. Mackay, 'Good Error-correcting Codes Based on Very Sparse Matrices,' IEEE Trans. Inform. Theory, vol. 45, no. 2, pp. 399-431, Mar. 1999   DOI   ScienceOn
16 S. Hong and W. Stark, 'Design and Implementation of a Low Complexity VLSI Turbo-code Decoder Architecture for Low Energy Mobile Wireless Communications,' J. VLSI Signal Processing System, vol. 24, no. 1, pp. 43-57, Feb. 2000   DOI   ScienceOn