• Title/Summary/Keyword: Parity

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Genetic Algorithm with the Local Fine-Tuning Mechanism (유전자 알고리즘을 위한 지역적 미세 조정 메카니즘)

  • 임영희
    • Korean Journal of Cognitive Science
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    • v.4 no.2
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    • pp.181-200
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    • 1994
  • In the learning phase of multilyer feedforword neural network,there are problems such that local minimum,learning praralysis and slow learning speed when backpropagation algorithm used.To overcome these problems, the genetic algorithm has been used as learing method in the multilayer feedforword neural network instead of backpropagation algorithm.However,because the genetic algorith, does not have any mechanism for fine-tuned local search used in backpropagation method,it takes more time that the genetic algorithm converges to a global optimal solution.In this paper,we suggest a new GA-BP method which provides a fine-tunes local search to the genetic algorithm.GA-BP method uses gradient descent method as one of genetic algorithm's operators such as mutation or crossover.To show the effciency of the developed method,we applied it to the 3-parity bit problem with analysis.

Design and Performance Evaluation of Software RAID for Video-on-Demand Servers (주문형 비디오 서버를 위한 소프트웨어 RAID의 설계 및 성능 분석)

  • Koh, Jeong-Gook
    • Journal of the Korean Society of Industry Convergence
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    • v.3 no.2
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    • pp.167-178
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    • 2000
  • Software RAID(Redundant Arrays of Inexpensive Disks) is defined as a storage system that provides capabilities of hardware RAID, and guarantees high reliability as well as high performance. In this paper, we propose an enhanced disk scheduling algorithm and a scheme to guarantee reliability of data. We also design and implement software RAID by utilizing these mechanism to develop a storage system for multimedia applications. Because the proposed algorithm improves a defect of traditional GSS algorithm that disk I/O requests arc served in a fixed order, it minimizes buffer consumption and reduces the number of deadline miss through service group exchange. Software RAID also alleviates data copy overhead during disk services by sharing kernel memory. Even though the implemented software RAID uses the parity approach to guarantee reliability of data, it adopts different data allocation scheme. Therefore, we reduce disk accesses in logical XOR operations to compute the new parity data on all write operations. In the performance evaluation experiments, we found that if we apply the proposed schemes to implement the Software RAID, it can be used as a storage system for small-sized video-on-demand servers.

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Analysis of Environmental Effect on Reproductive Trait(Litter Size at Birth and Weaning Rate) in Swine (국내 돼지의 번식 형질(산자수 및 이유율)에 대한 환경효과 분석)

  • Choi, Tae-Jeong;Kwak, Chun-Uk;Song, Kyu-Bong;Na, Jong-Sam;Choe, Ho-Sung
    • Reproductive and Developmental Biology
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    • v.34 no.1
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    • pp.27-32
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    • 2010
  • This study was conducted to estimate the effect of the breed, sire-breeds, farrowing year, farrowing season and parity on number of born alive (NBA), number of weaning (NW) and survival rates of weaning (SRW) in swine. The data were obtained from 46,704 litters of the Landrace, Yorkshire, Duroc and Cross breed farrowed from 1996 to 2005 at 142 GP are registered in Korean Animal Improvement Association (KAIA). There was highly significant effect of breed, sire breed, farrowing year, farrowing season and parity on NBA, NW, SRW (p<0.01). The result of this study could be available to genetic improvement of reproductive traits as a basic reference in Korean pig industry. To achieve the more effective improvement of reproductive traits, additional research such as genetic parameter evaluation should be performed.

Comparison of EXIT chart generation for LDPC and turbo codes (시뮬레이션 기법을 이용한 LDPC 부호와 터보부호에 대한 EXIT 차트 생성 비교)

  • Nyamukondiwa, Ramson Munyaradzi;Kim, Sooyoung
    • Journal of Satellite, Information and Communications
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    • v.10 no.3
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    • pp.73-77
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    • 2015
  • In this paper, we present two simulation methods to investigate the effect of excluding bit errors on generating the extrinsic information transfer (EXIT) chart for low density parity check (LDPC) and turbo codes. We utilized the simulation methods including and excluding bit errors to generate EXIT chart which was originally proposed for turbo codes. The generated EXIT charts for LDPC and turbo codes shows that the presented methods appropriately demonstrates the performance behaviours of iterative decoding for LDPC and turbo codes. Analysis on the simulation results demonstrates that the EXIT chart excluding the bit errors shows only a small part of the curves where the amount of information is too large.

SSD Cache for RAID: Integrating Data Caching and Parity Update Delay (RAID를 위한 SSD 캐시: 데이터 캐싱과 패리티 갱신 지연 기법의 결합)

  • Minh, Sophal;Lee, Donghee
    • KIISE Transactions on Computing Practices
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    • v.23 no.6
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    • pp.379-385
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    • 2017
  • In enterprise environments, hybrid storage typically utilizes SSDs over disk-based RAID. Typically, SSDs over RAID are used as the data cache. Recently, the LeavO caching scheme was introduced to reduce the parity update overhead of the underlying RAID. In this paper, we combine the data caching and LeavO caching schemes and derive cost models of the combined cache to determine the optimal data and LeavO cache sizes. We also propose the Adaptive Combined Cache that dynamically adjusts the data cache and LeavO cache sizes for evolving workloads. Experimental results show that the performance of the Adaptive Combined Cache is significantly superior to that of the conventional data caching scheme and is comparable with that of the off-line optimal scheme.

Fault Recover Algorithm for Cluster Head Node and Error Correcting Code in Wireless Sensor Network (무선센서 네트워크의 클러스터 헤드노드 고장 복구 알고리즘 및 오류 정정코드)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.20 no.4
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    • pp.449-453
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    • 2016
  • Failures would occur because of the hostile nature environment in Wireless Sensor Networks (WSNs) which is deployed randomly. Therefore, considering faults in WSNs is essential when we design WSN. This paper classified fault model in the sensor node. Especially, this paper proposed new error correcting code scheme and fault recovery algorithm in the CH(Cluster Head) node. For the range of the small size information (<16), the parity size of the proposed code scheme has the same parity length compared with the Hamming code, and it has a benefit to generate code word very simple way. This is very essential to maintain reliability in WSN with increase power efficiency.

Self-Adaptive Termination Check of Min-Sum Algorithm for LDPC Decoders Using the First Two Minima

  • Cho, Keol;Chung, Ki-Seok
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.4
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    • pp.1987-2001
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    • 2017
  • Low-density parity-check (LDPC) codes have attracted a great attention because of their excellent error correction capability with reasonably low decoding complexity. Among decoding algorithms for LDPC codes, the min-sum (MS) algorithm and its modified versions have been widely adopted due to their high efficiency in hardware implementation. In this paper, a self-adaptive MS algorithm using the difference of the first two minima is proposed for faster decoding speed and lower power consumption. Finding the first two minima is an important operation when MS-based LDPC decoders are implemented in hardware, and the found minima are often compressed using the difference of the two values to reduce interconnection complexity and memory usage. It is found that, when these difference values are bounded, decoding is not successfully terminated. Thus, the proposed method dynamically decides whether the termination-checking step will be carried out based on the difference in the two found minima. The simulation results show that the decoding speed is improved by 7%, and the power consumption is reduced by 16.34% by skipping unnecessary steps in the unsuccessful iteration without any loss in error correction performance. In addition, the synthesis results show that the hardware overhead for the proposed method is negligible.

LDPC Coding for image data and FPGA Implementation of LDPC Decoder (영상 정보의 LDPC 부호화 및 복호기의 FPGA구현)

  • Jang, Eun-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.4
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    • pp.569-574
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    • 2017
  • In order to transmit information in a channel environment in which noise exists, a coding technique of information is required. One of the coding techniques used for error detection and correction close to the Shannon limit is Low Density Parity Code(LDPC). LDPC and decoding characteristic features by Sum-product algorithm are matched for the performance to Turbo Code, RA(Repeat Accumulate) code, in case of very long code length of LDPC surpass their performance. This paper explains LDPC coding scheme of image data and decoding scheme, implements LDPC decoder in FPGA.

An analysis of Multi-mode LDPC Decoder Performance for IEEE 802.11n WLAN (IEEE 802.11n WLAN용 Multi-mode LDPC 복호기의 성능 분석)

  • Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.80-83
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    • 2010
  • This paper describes an analysis of decoding performance of multi-mode LDPC(Low Density Parity Check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3,3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder which adopts min-sum algorithm and layered decoding scheme is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, bit-width of integer and fractional parts, an optimal design condition and decoding performance of LDPC decoder are analyzed.

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Build-in Wiretap Channel I with Feedback and LDPC Codes

  • Wen, Hong;Gong, Guang;Ho, Pin-Han
    • Journal of Communications and Networks
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    • v.11 no.6
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    • pp.538-543
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    • 2009
  • A wiretap channel I is one of the channel models that was proved to achieve unconditional security. However, it has been an open problem in realizing such a channel model in a practical network environment. The paper is committed to solve the open problem by introducing a novel approach for building wiretap channel I in which the eavesdropper sees a binary symmetric channel (BSC) with error probability p while themain channel is error free. By taking advantage of the feedback and low density parity check (LDPC) codes, our scheme adds randomness to the feedback signals from the destination for keeping an eavesdropper ignorant; on the other hand, redundancy is added and encoded by the LDPC codes such that a legitimate receiver can correctly receive and decode the signals. With the proposed approach, unconditionallysecure communication can be achieved through interactive communications, in which the legitimate partner can realize the secret information transmission without a pre-shared secret key even if the eavesdropper has better channel from the beginning.