• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.533-536
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• 1998

The electrical characteristics of NMOSFETs with asymmetrical source/drain regions have been expermentally investigated using test devices fabricated by $0.35\mu\textrm{m}$ CMOS technology. The performance degradation for asymmetric transistor and its causes are analyzed. The parasitic resistances, such as series resistance of active regions and silicide junction contact resistance, are distributed in parallel along the channel. Depending on source/drain geometry, the array of those resistances is changed, that results the various electrical properties.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.12
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• pp.1-9
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• 2000

A new method, the external resistance method (ERM method), is proposed for accurate extraction of the gate bias-dependent effective channel carrier mobility (${\mu}_{eff}$) and separated parasitic source/drain resistances ($R_S$ and $R_D$) of n-channel MOSFET's. The proposed ERM method is applied to n-channel LDD MOSFETs with two different gate lengths ($W_m/L_m=30{\mu}m/0.6{\mu}m,\;30{\mu}m/1{\mu}m$) in the linear mode of current-voltage characteristics ($I_D-V_{GS},\;V_{DS}$). We also considered gate voltage dependence of separated $R_2$ and $R_D$ in the accurate modeling and extraction of effective channel carrier mobility. Good agreement of experimental data is observed in submicron n-channel LDD MOSFETs. Combining with capacitance-voltage characteristics, the ERM method is expected to be very useful for accurate and efficient extraction of ${\mu}_{eff},\;R_D,\;R_S$, and other characteristic parameters in both symmetric and asymmetric structure MOSFET's in which parasitic resistances are critical to the improvement of high speed performance and reliability.

• Pediatric Gastroenterology, Hepatology & Nutrition
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• v.11 no.sup1
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• pp.38-43
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• 2008

Enterobiasis and head lice infestations, contact-borne parasitic diseases, are the most prevalent parasitic infections of children in Korea, and they are transmitted by close contact with infected persons. They are not of major concern in public health, therefore their importance in children's health care are overlooked in Korea. Egg positive rates of Enterobius vermicularis have been reported to be 10~20% among children in kindergartens and primary schools. Enterobiasis is diagnosed by scotch tape anal swab, but repeated examination is necessary for accurate diagnosis. Albendazole or mebendazole are extremely effective for treatment, however, reinfections usually occur if treatment is not repeated at least three times at a 3-week-interval, targeting the whole family members including the patients. Environmental sanitation and health education are also necessary to guarantee the successful treatment of enterobiasis. Head lice infestation is still an indication of public health status. Children of 3 to 12 years old and their families have infestations more frequently, and girls have more than boys. Diagnosis can be made by identification of live lice or nits on the head. Pediculicides are effective treatment of infestations, however they do not kill nits completely, requiring second treatment. Recently wet combing is preferred as an alternative by parents in England because of possible toxicity of drugs and resistance of lice. It is impossible to completely prevent enterobiasis and/or head lice infestations. Therefore, mass screening and prevention are required, and, in local clinics, a thorough evaluation of the symptoms and past history, and appropriate laboratory tests are necessary.

• Journal of international Conference on Electrical Machines and Systems
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• v.2 no.1
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• pp.57-64
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• 2013

The functional characteristic of LISN circuit, which is used for measurements of conductive noise in mains power line, is basically related to frequency characteristics of passive elements like inductors used in the circuit as well as the frequency response of inductors is highly related to the resins used in the varnishing process. The significant problem in determination of an inductor's frequency characteristic is the intrinsic resistance, inductance and parasitic capacitance. In this triplet, the parasitic capacitance is the major limiting factor of inductor's frequency range. This capacitance depends on inductor design parameters and materials filling the spaces of coil like resin and its coherency after curing process. In this paper, two similar inductors were designed and built. The first inductor was not varnished while the second one was varnished with VPI technology. VPI, or Vacuum, Pressure, Impregnation technology is one of the most reliable methods performing good insulating conditions for electrical circuits and windings based on resins. The measured results show that implying varnishing technology does not significantly affect the frequency response. However, due to mechanical solidity aspects and improved environmental protection, it is better to varnish the inductors.

• Journal of the Semiconductor & Display Technology
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• v.2 no.2
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• pp.17-20
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• 2003

The current drive in an MOSFET is limited by the intrinsic channel resistance. All the other parasitic elements in a device structure playa significant role and degrade the device performance. These other resistances need to be less than 10%-20% of the channel resistance. To achieve the requirements, we should investigate a methodology of separation and quantification of those resistances. In this paper, we developed the extraction method of resistances using calibrated TCAD simulation. The resistance of the extension region is also partially determined by the formation of a surface accumulation region that forms under the gate in the tail region of the extension profile.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.10
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• pp.1664-1671
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• 2016

This paper presents the analysis of the gate-source voltage of the gallium nitride high electronic mobility transistor (GaN HEMT) in the half bridge structure focused on the mutual effects of two switching operation. Especially low side gate-source voltage is analyzed mathematically according to the high side switch turn-on and turn-off operation. Moreover, the influence of each gate resistance and parasitic component on the switching characteristic of other side switch is investigated, and the formula, simulation and experimental results are compared with theoretical data.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.63-72
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• 2004

The supply voltage has been drop rapidly and the total length of the wire increased exponentially in the nanometer SoC design environment. The ideal supply voltage was dropped sharply by the resistance and parasitic devices which stayed on the kilometers-long wire length. Even worse, it could severely affect the functional behavior of the block of the design. To analyze the effects of the long wire of the SoC while maintaining the accuracy, the modeling of the current and the RC conversion of the parasitic techniques are researched and applied. By these modeling and conversion, the multi-million gates HDTV Chipset can be analyzed within a day. The benchmark analysis of the HDTV SoC showed the superiority to the conventional methods in performance and accuracy.

• Journal of Information Display
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• v.1 no.1
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• pp.29-31
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• 2000

A 21.6" a-Si:H TFT array for direct conversion X-ray detector with 2480 by 3072 pixels is successfully developed. To obtain X-ray image of satisfactory quality, a novel structure with a storage electrode on BCB is proposed. The structure reduces the parasitic capacitance of data line, which is one of the main sources of signal noise. Also, the structure shows greater resistance to failure than that of the conventional design.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.33-41
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• 2003

In this work, process optimization techniques for high frequency performance of HBTs are presented. The techniques are focused on reducing parasitic base resistance and base-collector capacitance, which are key elements determining the high frequency characteristics of HBTs. Several fabrication techniques, which can significantly reduce the parasitic elements of the HBTs for improved high frequency performance, are proposed and verified by the measured data of the fabricated devices.

• Journal of the Korean Magnetics Society
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• v.5 no.5
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• pp.828-832
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• 1995

This paper describes the efficient design, analysis method and experimental verification of capacitor discharge impulse magnetizer system. A capacitor discharge magnetizer system is used to produce a high current impulse of short duration in this magnetizing fixture. The parasitic resistance and parasitic inductance of the capacitor discharge impulse magnetizer system have been estimated using known air-core test coil. Finite element analysis (using MAXWELL 2-D field simulator) and magnetizing circuit analysis (using SPICE) are also used as part of the design and analysis process of the capacitor discharge impulse magnetizer system. Application study for a magnetizing fixture design is shown. 8-pole magnetizing fixture has been designed and analyzed using finite element analysis. The fixture design for 8-pole magnet are presented along with the experimental results. The experimental results have been achieved using a high-voltage, high-energy capacitor discharge impulse magnetizer and 8-pole iron core fixtures (charging voltage : 2000[V], capacitor bank : 4000[$\mu\textrm{F}$]).