• ETRI Journal
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• 제26권6호
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• pp.520-534
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• 2004

As the density of memories increases, unwanted interference between cells and the coupling noise between bit-lines become significant, requiring parallel testing. Testing high-density memories for a high degree of fault coverage requires either a relatively large number of test vectors or a significant amount of additional test circuitry. This paper proposes a new tiling method and an efficient built-in self-test (BIST) algorithm for neighborhood pattern-sensitive faults (NPSFs) and new neighborhood bit-line sensitive faults (NBLSFs). Instead of the conventional five-cell and nine-cell physical neighborhood layouts to test memory cells, a four-cell layout is utilized. This four-cell layout needs smaller test vectors, provides easier hardware implementation, and is more appropriate for both NPSFs and NBLSFs detection. A CMOS column decoder and the parallel comparator proposed by P. Mazumder are modified to implement the test procedure. Consequently, these reduce the number of transistors used for a BIST circuit. Also, we present algorithm properties such as the capability to detect stuck-at faults, transition faults, conventional pattern-sensitive faults, and neighborhood bit-line sensitive faults.

• The Journal of Korean Physical Therapy
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• 제19권6호
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• pp.11-15
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• 2007

Purpose: This study examined the various patterns of standing to squatting activities, and reports the testing standard and phases for examining the standing to squatting position. Methods: One thousand, normal college students (500 males, 500 females) volunteered for this study. The patterns are performed by naked eye analysis with two video cameras. Results: The patterns from the standing to squatting position are as follows 1. parallel with the heel on the pattern: 2. parallel with the heel off the pattern: 3. closed with the heel on the pattern: 4. closed with the heel on the pattern: 5. open with the heel on the patternand 6. open with the heel on the pattern. Conclusion: The phases of the standing to squatting position are as follows: phase I from standing to the anterior parts of the knees reaching the anterior limit of the BOS, phase II from phase I until the height of the hip and knee joints are the same, phase III from phase II until there was no full squatting and the heels broke contact with the floor and phase IV from phase III full squatting on the heels in contact with the floor.

• Structural Engineering and Mechanics
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• 제38권6호
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• pp.803-823
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• 2011

In this paper, the three dimensional Parallel Realistic Failure Process Analysis ($RFPA^{3D}$-Parallel) code based on micromechanical model is employed to investigate the bonding behavior in FRP sheet bonded to concrete in single shear test. In the model, the heterogeneity of brittle disordered material at a meso-scale was taken into consideration in order to realistically demonstrate the mechanical characteristics of FRP-to-concrete. Modified Mohr-coulomb strength criterion with tension cut-off, where a stressed element can damage in shear or in tension, was adopted and a stiffness degradation approach was used to simulate the initiation, propagation and growth of microcracks in the model. In addition, a Master-Slave parallel operation control technique was adopted to implement the parallel computation of a large numerical model. Parallel computational results of debonding of FRP-concrete visually reproduce the spatial and temporal debonding failure progression of microcracks in FRP sheet bonded to concrete, which agrees well with the existing testing results in laboratory. The numerical approach in this study provides a useful tool for enhancing our understanding of cracking and debonding failure process and mechanism of FRP-concrete and our ability to predict mechanical performance and reliability of these FRP sheet bonded to concrete structures.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회A
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• pp.735-738
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• 2008

A 6 D.O.F Stewart platform type parallel robot has been developed as a simulator to test the surveillance robot stabilization control. Since the surveillance robot is installed on the unmanned ground vehicle (UGV), it is required to have a stabilization control system to compensate the disturbance from the UGV. PID control scheme has been applied to the parallel robot to generate controlled motion following the input motion.

• 정보처리학회논문지A
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• 제8A권2호
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• pp.125-132
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• 2001

IBM developed the MPI-IO, we call it MPI-2, on the General Parallel File System. We designed and implemented various Matrix Multiplication Benchmarks to evaluate its performances. The MPI-IO on the General Parallel File System shows four kinds of data access methods : the non-collective and blocking, the collective and blocking, the non-collective and non-blocking, and the split collective operation. In this paper, we propose benchmarks to measure the IO time and the computation time for the data access methods. We describe not only its implementation but also the performance evaluation results.

• 전자공학회논문지C
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• 제34C권6호
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• pp.44-50
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• 1997

This paper describes the design and test of an on-line non-invasive network performance monitor (hardware portion) for the SPAX parallel computer. The SPAX parallel computer supports up to 256 intel P6 processors with 4 P6 processors constituting a processign node. The nodes are interconnected with a dual two-level crossbar network calle dXcent-net. Since the performance of the SPAX parallel computer is highly dependent on the proper and efficient operation of the network, an on-line non-invasive network performance monitor (with hardware components) has been developed to aid in the monitoring and tunign of the Xcent-net. Successful testing of a prototype node monitor board and PC interface system shows that our monitor design provides a low-cost practical solution to this problem.

• 대한전자공학회논문지SD
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• 제43권10호
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• pp.140-150
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• 2006

본 논문은 SOC 내부의 다양한 코어들을 효율적으로 테스트하기 위한 하드웨어 구조에 초점을 두고 있다. 기존의 한 번에 한 개의 코어만을 순차적으로 테스트하는 방식은 많은 테스트 시간을 요구한다. 이를 보완하고자 본 논문에서는 병렬적으로 여러 코어를 테스트할 수 있는 S-TAM 구조 및 컨트롤러를 제안한다. S-TAM 구조는 테스트 버스 공유 방식을 이용하여 브로드캐스트 방법을 지원하며 이를 기반으로 하여 임의의 코어만을 선택적으로 테스트할 수도 있다. 이뿐 아니라 S-TAM 컨트롤러는 IEEE 1149.1 및 IEEE 1500 등과 같은 서로 상이한 테스트 기반을 통해 구현된 다양한 코어들을 동시에 제어함으로써 효과적인 SOC 테스트를 가능하게 한다.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 1996년도 춘계학술대회 논문집
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• pp.85-90
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• 1996

In the word, there is varied types of vibration, and these affect the mechanical industry. In this paper is plates with two parallel sides fixed. Electronic speckle pattern interferometry (ESPI) is one of the optical nondestructive testing technique. By using the ESPI, vibration modes for excitation point, a/b(ratio of longuitudinal and lateral length), and kind of specimen are measured and compared qualitatively with theoritical analysis that Warburton proposed.

• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.839-847
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• 2016

Energy recovery battery testing systems (ERBTS) have been widely used in battery manufactures. All the ERBTS are connected in parallel which forms a special and complicated micro-grid system, which has the shortcomings of low energy recovery efficiency, complex grid-connected control algorithms issues for islanded detection, and complicated power circuit topology issues. To solve those shortcomings, a DC micro-grid system is proposed, the released testing energy has the priority to be reutilized between various testing system within the local grid, Compared to conventional scheme, the proposed system has the merits of a simplified power circuit topology, no needs for synchronous control, and much higher testing efficiency. The testing energy can be cycle-used inside the local micro-grid. The additional energy can be recovered to AC-grid. Numerous experimental comparison results between conventional and proposed scheme are provided to demonstrate the validity and effectiveness of the proposed technique.

• 한국정보과학회논문지:소프트웨어및응용
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• 제27권2호
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• pp.108-119
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• 2000

병렬 프로그램 테스팅을 위한 기존의 연구는 대부분 프로그램 수행 중에 얻어진 이벤트 트레이스(event trace)를 바탕으로 재수행성을 보장하는데 중점을 두고 있다. 반면에 개발과정에서 만들어진 요구/설계 명세로부터 테스팅을 위한 이벤트 시퀀스를 생성하는 방법에 대한 연구는 빈약한 실정이다. 이 논문에서는 통신 소프트웨어 개발 분야에서 광범위하게 사용되는 메시지 순차도(MSC)로부터 병렬 프로그램의 모듈 테스팅을 위한 이벤트 시퀀스를 생성하는 방법을 제시한다. 명세로부터 이벤트 시퀀스를 생성하기 위해서는 명세 내에 묵시적으로 포함되어 있는 이벤트들과 그들 간의 선후관계를 파악해야 한다. 이를 위해서 이 연구에서는 프로그램 수행 중에 이벤트들의 발생 순서를 결정하기 위해 사용해오던 논리시간 벡터(logical time stamp)를 MSC 명세에 적용함으로써 이벤트 간의 선후관계를 추출한다. 또한 이를 바탕으로 이벤트 시퀀스를 자동 생성하는 방법을 제시하고 전화 통화 예제를 사용해서 제시한 방법의 효용성을 보인다.