• Journal of information and communication convergence engineering
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• 제14권4호
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• pp.252-257
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• 2016

An edge-located electromagnetic bandgap (EL-EBG) structure using a defected ground structure (DGS) is proposed to suppress resonant modes induced by edge excitation in a two-dimensional planar parallel plate waveguide (PPW). The proposed EL-DGS-EBG PPW significantly mitigates multiple transverse-magnetic (TM) modes in a wideband frequency range corresponding to an EBG stopband. To verify the wideband suppression, test vehicles of a conventional PPW, a PPW with a mushroom-type EBG structure, and an EL-DGS-EBG PPW are fabricated using a commercial process involving printed circuit boards (PCBs). Measurements of the input impedances show that multiple resonant modes of the previous PPWs are significantly excited through an input port located at a PPW edge. In contrast, resonant modes in the EL-DGS-EBG PPW are substantially suppressed over the frequency range of 0.5 GHz to 2 GHz. In addition, we have experimentally demonstrated that the EL-DGS-EBG PPW reduces the radiated emission from -24 dB to -44 dB as compared to the conventional PPW.

• 한국정밀공학회지
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• 제26권10호
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• pp.47-55
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• 2009

In this study, a robot foot having toes for firm stepping on uneven surface is proposed. The toes are connected to the lower leg by parallel links so that the lower leg can rotate in the rolling and pitching directions during stance phase without ankle joint. The landing performance of the foot on uneven surface was evaluated by relative comparison with that of the most common foot making point contact with the walking surface, since the test conditions considering real uneven surface could be hardly defined for its objective evaluation. Anti-slip margin(ASM) was defined in this study to express the slip resistance of a robot foot when it lands on a projection with half circular-, triangular- or rectangular cross section, assuming that uneven surface consists of projections having these kind of cross sections in different sizes. Based on the ASM analysis, the slip conditions for the two feet were experimentally confirmed. The results showed that the slip resistance of the new foot is not only higher than that of the conventional point contact type foot but also less sensitive to the surface friction coefficient.

• Progress in Superconductivity
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• 제3권1호
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• pp.99-103
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• 2001

We have conducted two runs of interlaboratory comparison on Ag-sheathed Bi-2223 tapes to evaluate the level of measurement techniques for the critical current measurement. Two classes of specimens were prepared for parallel and serial routings and sent to four participating laboratories. The critical currents of specimens were measured at 77 K in zero magnetic field. In the first comparison, we used twenty different Bi-2223 tapes as specimens for comparison and participating laboratories measured the specimens using their own instruments and procedures. As a result, the scattering of data on the first comparison showed -3.0% to +l2.2% for the parallel routing and -0.7% to +l5.1% for the serial routing. Major sources of these variations were attributed to different measurement techniques. Thus, the second comparison of measurement was done on the same specimens under specified measurement conditions, particularly in terms of cooling procedure and sweep rate of the test current. The variations for the second comparison were decreased -3.1% to +3.2% far the parallel routing and -1.8% to +7.7% fur the serial routing.

• 대한안전경영과학회지
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• 제6권4호
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• pp.155-170
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• 2004

Among the semiconductor If-chips, unlike memory chips, a majority of Application Specific IC(ASIC) products are produced by customer orders, and meeting the customer specified due date is a critical issue for the case. However, to the one who understands the nature of semiconductor manufacturing, it does not take much effort to realize the difficulty of meeting the given specific production due dates. Due to its multi-layered feature of products, to be completed, a semiconductor product(called device) enters into the fabrication manufacturing process(FAB) repeatedly as many times as the number of the product specified layers, and fabrication processes of individual layers are composed with similar but not identical unit processes. The unit process called photo-lithography is the only process where every layer must pass through. This re-entrant feature of FAB makes predicting and planning of due date of an ordered batch of devices difficult. Parallel machines problem in the photo process, which is bottleneck process, is solved with restricted roll out algorithm. Roll out algorithm is a method of solving the problem by embedding it within a dynamic programming framework. Restricted roll out algorithm Is roll out algorithm that restricted alternative states to decrease the solving time and improve the result. Results of simulation test in condition as same as real FAB facilities show the effectiveness of the developed algorithm.

• Management Science and Financial Engineering
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• 제19권1호
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• pp.29-36
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• 2013

This paper considers common due-date assignment and scheduling on parallel machines. The main decisions are: (a) deter-mining the common due-date; (b) allocating jobs to machines; and (c) sequencing the jobs assigned to each machine. The objective is to minimize the sum of the penalties associated with common due-date assignment, earliness and tardiness. As an extension of the existing studies on the problem, we consider sequence-dependent setup times that depend on the type of job just completed and on the job to be processed. The sequence-dependent setups, commonly found in various manufacturing systems, make the problem much more complicated. To represent the problem more clearly, a mixed integer programming model is suggested, and due to the complexity of the problem, two heuristics, one with individual sequence-dependent setup times and the other with aggregated sequence-dependent setup times, are suggested after analyzing the characteristics of the problem. Computational experiments were done on a number of test instances and the results are reported.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권2호
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• pp.65-72
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• 2001

This paper presents the design and test results of a 10kVA single phase HTS transformer which is operating at 77K. Double pancake windings with BSCCO -2223 HTS tape and GFRP cryostat with room temperature bore are used in the transformer. Four double pan cake windings were used in pancake windings are connected in parallel to conduct the secondary current of 45.4A. the rated voltages of each winding are 440/220V. Numerical calculation using Finite Element Method was used to evaluated the performance of each arrangement. Considering the magnetizing reactance, leakage reactance, electrical insulation and the circulating current in low voltage winding which had two windings in parallel, HLLH arrangement was finally chosen. Estimation of the AC loss, magnetizing loss and self field loss, in the design stage, where effects of perpendicular field and parallel field are considered. Room temperature bore type cryostat has been constructed and its heat loss was measured.

• Transactions on Electrical and Electronic Materials
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• 제5권1호
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• pp.19-23
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• 2004

A novel method of high speed, accurate circuit simulation in 3-dimensional (3-D) parallel-plate capacitors is investigated. The basic concept of the circuit simulation methods is partial element equivalent circuit model. The three test structures of 3-D parallel-plate capacitors are fabricated by using multi-layer low-temperature co-fired ceramic (LTCC) process and their S-parameters are measured between 50 MHz and 5 GHz. S-parameters are converted to Y-parameters, for comparing measured data with simulated data. The circuit model parameters of the each building block are optimized and extracted using HSPICE circuit simulator. This method is convenient and accurate so that circuit design applications can be easily manipulated.

• Journal of Power Electronics
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• 제13권3호
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• pp.329-338
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• 2013

In this paper, the charging characteristics of series resonant type high voltage capacitor chargers considering the transformer stray capacitance have been studied. The principles of operation for the four operational modes and the mode changes for the four different switching frequency sections are explained and analyzed in the range of switching frequency below the resonant frequency. It is confirmed that the average charging currents derived from the above analysis results have non-linear characteristics in each of the four modes. The resonant current, resonant voltage, charging current, and charging time of this capacitor charger as variations of the switching frequency, series parallel capacitance ratio ($k=C_p/C_s$), and output voltage are calculated. From the calculation results, the advantages and disadvantages arising from the parallel connection of this stray capacitance are described. Some methods to minimize charging time of this capacitor charger are suggested. In addition, the results of a comparative test using two transformers whose stray capacitances are different are described. A 1.8 kJ/s prototype capacitor charger is assembled with a TI28335 DSP controller and a 40 kJ, 7 kV capacitor. The analysis results are verified by the experiment.

• 한국해안해양공학회지
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• 제19권1호
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• pp.1-15
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• 2007

서해연안역의 폭풍해일고 산정을 위한 초기 연구 단계로, 8 node 병렬 리눅스 클러스터의 효율성과 함께 황해 조석 모의결과의 신뢰성을 검토하였다. NPB 벤치마크 결과 7배에 이르는 계산 효율의 성능향상을 보였다. pADCIRC 모델을 이용한 황해 조석재현 결과는 선행된 연구들과 비교하여 만족스런 신뢰성을 나타냈다. 모델 변수 선정에 따른 영향을 살펴본 바에 따르면, 우리나라 서해연안과 같은 천해역의 조석수동역학 해석에는 수심에 따른 바닥마찰계수의 적절한 사용이 필수적인 것으로 분석되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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• pp.1216-1218
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• 2005

A high temperature superconducting power transformer gets its advantages over the conventional ones when the rated capacity of the HTS transformer becomes 30 MVA or more. The standard capacity of the recent 154 kV/ 22.9 kV power transformer is 3 phase 60 MVA in Korea which means that the rated current of the secondary becomes more than 1,500 amps. Considering the current capacities of the HTS wires being developed recently, it is inevitable to use the HTS wires in parallel in order to be applied to the power transformer. But nonuniform distribution of currents and large AC losses are major problems in parallel HTS windings setting aside the difficulties of making parallel windings. To solve these problems, several kinds of multiply laminated HTS wires were fabricated and tested for the application of these multiple wire to an HTS power transformer. Test results were compared with that of each other and the best were selected for the application to an HTS power transformer.