• Journal of Korea Multimedia Society
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• v.1 no.2
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• pp.154-161
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• 1998

This paper proposes a parallel processor system which processes cultural assets image recognition and retrieval algorithm in real time. A serial algorithm which is developed for the parallel processor system is parallellized. The parallel processor system consists of a control unit, 100 PE(Processing Elements), and 10 Park's multi-access memory systems which has 11 memory modules per each one. The parallel processor system is simulated by CADENCE Verilog-XL which is a package for the hardware simulation. With the same simulated results as that of the serial algorithm, the speed ratio of the parallel algorithm to the serial one is 81. The parallel processor system we proposed is quite effective for cultural assets image processing.

• The Journal of the Korea Contents Association
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• v.16 no.3
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• pp.91-101
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• 2016

This paper presents the design of new parallel BCH decoder for MLC NAND flash memory. The proposed decoder supports the multi-byte parallel operations to enhance its throughput. In addition, it employs a LFSR-based parallel syndrome generator for compact hardware design. The proposed BCH decoder is synthesized with hardware description language, VHDL and it is verified using Xilinx FPGA board. From the simulation results, the proposed BCH decoder enhances the throughput by 2.4 times than its predecessor employing byte-wise parallel operation. Compared to the other counterpart employing a GFM-based parallel syndrome generator, the proposed BCH decoder requires the same number of cycles to complete the given works but the circuit size is reduced to less than one-third.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.4
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• pp.388-394
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• 1999

This paper is concerned with an application of Parallel Genetic Algorithms(PGA) to optimal econmic load dispatch(ELD) in power systems. The ELD problem is to minimize the total generation fuel cost of power outputs for all generating units while satisfying load balancing constraints. Genetic Algorithms(GA) is a good candidate for effective parallelization because of their inherent principle of evolving in parallel a population of individuals. Each individual of a population evaluates the fitness function without data exchanges between individuals. In application of the parallel processing to GA, it is possible to use Single Instruction stream, Multiple Data stream(SIMD), a kind of parallel system. The architecture of SIMD system need not data communications between processors assigned. The proposed ELD problem with C code is implemented by SIMSCRIPT language for parallel processing which is a powerfrul, free-from and versatile computer simulation programming language. The proposed algorithms has been tested for 38 units system and has been compared with Sequential Quadratic programming(SQP).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.7
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• pp.1059-1065
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• 2017

In this paper, the energy harvester with a piezoelectric materials is modeled as the electric equivalent circuit, and performances of a standard DC method and a Parallel-SSHI method are verified through experiment under variable force and load conditions. Piezoelectric generator consists of mass, damper and spring constant, and it is modeled by electrical equivalent circuit with RLC components. Standard DC and Parallel-SSHI are used as power conversion methods, and standard DC consists of full-bridge rectifier and smoothing capacitor. Parallel-SSHI method is composed of L-C resonant circuit, zero-crossing detector and full-bridge rectifier. In case of simulation under $100k{\Omega}$ load condition, the harvested power is $500{\mu}W$ in Standard DC and $670{\mu}W$ in Parallel-SSHI, respectively. In experiment, the harvested power under $100k{\Omega}$ load condition is $420{\mu}W$ in standard DC and $602{\mu}W$ in Parallel-SSHI. Harvested power of Parallel-SSHI is improved by approximately 40% more than that of standard DC method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10A
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• pp.776-783
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• 2009

Current-cut circuit is an effective method to obtain low power consumption in wireless communication systems as high speed OFDM. For the operation of current-mode FFT LSI with analog signal processing essentially requires current-mode serial-to-parallel/parallel-to-serial converter with multi input and output structure. However, the Hold-mode operation of current-mode serial-to-parallel/parallel-to-serial converter has unnecessary power consumption. We propose a novel current-mode serial-to-parallel/parallel-to-serial converter with current-cut circuit and full chip simulation results agree with experimental data of low power consumption. The proposed current-mode serial-to-parallel/parallel-to-serial converter promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.

• Nuclear Engineering and Technology
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• v.49 no.6
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• pp.1310-1317
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• 2017

GASFLOW-MPI is a widely used scalable computational fluid dynamics numerical tool to simulate the fluid turbulence behavior, combustion dynamics, and other related thermal-hydraulic phenomena in nuclear power plant containment. An efficient scalable linear solver for the large-scale pressure equation is one of the key issues to ensure the computational efficiency of GASFLOW-MPI. Several advanced Krylov subspace methods and scalable preconditioning methods are compared and analyzed to improve the computational performance. With the help of the powerful computational capability, the large eddy simulation turbulent model is used to resolve more detailed turbulent behaviors. A backward-facing step flow is performed to study the free shear layer, the recirculation region, and the boundary layer, which is widespread in many scientific and engineering applications. Numerical results are compared with the experimental data in the literature and the direct numerical simulation results by GASFLOW-MPI. Both time-averaged velocity profile and turbulent intensity are well consistent with the experimental data and direct numerical simulation result. Furthermore, the frequency spectrum is presented and a -5/3 energy decay is observed for a wide range of frequencies, satisfying the turbulent energy spectrum theory. Parallel scaling tests are also implemented on the KIT/IKET cluster and a linear scaling is realized for GASFLOW-MPI.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2007.11a
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• pp.497-498
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• 2007

• Journal of the Korea Society for Simulation
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• v.21 no.2
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• pp.31-39
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• 2012

Simulation Framework is a basic software tool used to develop simulation applications. This paper describes the development of a discrete event simulation framework based on DEVS(Discrete EVent System Specification) formalism, using MATLAB language which is widely used in technical computing and engineering disciplines. The newly developed framework utilizing MATLAB object oriented programming combines the convenience of MATLAB language and the sophisticated architecture of the DEVS formalism. Hence, it supports the productivity, flexibility, extensibility that are required for the simulation application software development of the weapon systems engagement. Moreover, it promises a simulation application the increased the computation speed proportional to the number of CPU of a multi-core processor, providing the batch simulation functionality based on MATLAB parallel computing technology.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.8
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• pp.2691-2707
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• 2014

Medium access control is critical in wireless networks for efficient spectrum utilization. In this paper, we introduce a novel collision resolution method based on the technique of known interference cancellation, and propose a new MAC protocol named as CR-MAC, in which AP tries to decode all the collided data packets by combining partial retransmissions and known interference cancellation. As the collided transmissions are fully utilized, less retransmission is required, especially in a crowded network. The NS-2simulation and MATLAB numerical results show that, under various network settings, CR-MAC performs much better than the IEEE 802.11 DCF in terms of the aggregation throughput and the expected packet delay.

• Journal of Power Electronics
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• v.12 no.1
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• pp.83-87
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• 2012

Input-series-output-parallel (ISOP) modular converters consisting of multiple modular DC/DC converters can enable low voltage rating switches for use in high voltage input applications. In this paper, an input voltage sharing control strategy for input-series-output-parallel (ISOP) full-bridge (FB) DC/DC converters is proposed. By sensing the difference in the input current of two modules, the system can achieve input voltage sharing for DC-DC modules. The effectiveness of the proposed control strategy is verified by simulation and experimental results obtained with a 200w-50kHz prototype.