• Journal of Applied Reliability
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• v.17 no.1
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• pp.72-77
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• 2017

Purpose: The electrochemical corrosion behavior of tin oxide film coated on PET substrates has been studied under varying concentrations of acrylic acid to investigate possible corrosion in contact with the acidic environment. Method: Potentiodynamic test was performed for a commercial ITO/PET film in 0.1, 0.3, and 0.5 M of acrylic acid. The surface morphology was analyzed by scanning electron microscope (SEM) and energy dispersive spectroscopy (EDS). Results: Potentiodynamic test results showed an increase in Icorr and decrease in Ecorr value with increasing concentration of acid. Microscopic evaluation suggested the presence of certain deep cracks on the surface of the film in addition with a severe acidic attack. Conclusion: Exposure of ITO to acrylic acid resulted in the stress corrosion cracking of ITO film due to the mechanical mismatch between brittle inorganic ITO fim and a compliant organic PET substrate leading to the subsequent failure of the film.

• Journal of the Korean Ceramic Society
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• v.49 no.1
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• pp.11-18
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• 2012

The characteristic features of solid oxide fuel cells are reviewed from the viewpoint of the thermodynamic variables to be developed inside cells/stacks particularly in terms of gradients of chemical potential, electrical potential and temperature and corresponding flows of air, fuel, electricity and heat. Examples of abrupt destruction of SOFC systems were collected from failures in controlling their steady flows, while continuous degradation was caused by materials behaviors under gradients of chemical potentials during a long operation. The local equilibrium approximation has been adopted in NEDO project on the durability/reliability of SOFC stacks/systems; this makes it possible to examine the thermodynamic stability/reactivity as well as mass transfer under the thermodynamic variable gradients. Major results of the NEDO project are described with a focus on degradation/deterioration of electrolyte and electrode materials.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.188-198
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• 1993

We have developed a technique for growing thin oxides (6~10 nm) by the Last step TCA method. N-channel metal-oxide-semiconductor (n-MOS) capacitor and n-channel metal-oxide-semiconductor field-effect transistor's (MOSFET's) having a gate oxide with chlorine incorporated $SiO_2/Si$ interface have been analyzed by electrical measurements and physical methods, such as secondary ion mass spectrometry (SIMS) and electron spectroscopy for chemical analysis (ESCA). The gate oxide grown with the Last strp TCA method has good characteristics as follows: the electron mobility of the MOSFET's with the Last step TCA method was increased by about 7% and the defect density at the $SiO_2/Si$ interface decreases slightly compared with that with No TCA method. In reliability estimation, the breakdown field was 18 MV/cm, 0.6 MV/cm higher than that of the gate oxide with No TCA method, and the lifetime estimated by TDDB measurement was longer than 20 years. The device lifetime estimated from hot-carrier reliability was proven to be enhanced. As the results, the gate oxide having a $SiO_2/Si$ interface incorporated with chlorine has good characteristics. Our new technique of Last step TCA method may be used to improve the endurance and retention of MOSFET's and to alleviate the degradation of thin oxides in short-channel MOS devices.

• Proceedings of the KIEE Conference
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• 1988.11a
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• pp.147-150
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• 1988

Since the integration level of VLSI circuits progresses very quickly, a highly reliable thin $SiO_2$ film is required to fabricate a small-geometry MOS device. In the present study we have attempted to eliminate the failure-causing defects that develop in thin oxide films during the oxidation step by performing a long-time preoxidation and postoxidation annealing. The TDDB test and the copper decoration method were used to calculate the oxide defects density of MOS device. The dielectric reliability of high-quality thin oxides have been studied by using the time-zero-dielectric-breakdown (ramp-voltage-stressed I-V) and time-dependent-dielectric -breakdown (Constant-stressed I-V) tests. Failure times against temperature and electric field are examined and acceleration factors are abtained for each parameter. Based on the data obtained, breakdown wearout limitation for thin oxide films is estimated.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.431-431
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• 2013

Flexible Organic Light Emitting Diode (OLED) displays are required for future devices. It is possible that plastic substrates are instead of glass substrates. But the plastic substrates are permeable to moisture and oxygen. This weak point can cause the degradation of fabricated flexible devices; therefore, encapsulation process for flexible substrate is needed to protect organic devices from moisture and oxygen. Y.G. Lee et al.(2009) [1] reported organic and inorganic multilayer structure as an encapsulation barrier for enhanced reliability and life-time.Flowable Oxide process is a low-temperature process which shows the excellent gap-fill characteristics and high deposition rate. Besides, planarization is expected by covering dust smoothly on the substrate surface. So, in this research, Bi-layer structured is used for encapsulation: Flowable Oxide Thin film by PECVD process and Al2O3 thin film by ALD process. The samples were analyzed by water vapor transmission rate (WVTR) using the Calcium test and film cross section images were obtained by FE-SEM.

• Journal of the Semiconductor & Display Technology
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• v.21 no.2
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• pp.74-84
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• 2022

As the semiconductor industry develops, the difficulty of newly required process technology becomes difficult, and the importance of production yield and product reliability increases. As an effort to minimize yield loss in the manufacturing process, interests in the process defect process for facility diagnosis and defect identification are continuously increasing. This research observed the plasma condition changes in the multi oxide/nitride layer deposition (MOLD) process, which is one of the 3D-NAND manufacturing processes through optical emission spectroscopy (OES) and monitored the result of whether the change in plasma characteristics generated in repeated deposition of oxide film and nitride film could directly affect the film. Based on these results, it was confirmed that if a change over a certain period occurs, a change in the plasma characteristics was detected. The change may affect the quality of oxide film, such as the film thickness as well as the interfacial surface roughness when the oxide and nitride thin film deposited by plasma enhenced chemical vapor deposition (PECVD) method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.13-19
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• 2010

MOSFET with deuterium-incorporated gate oxide shows enhanced reliability compared to conventional MOSFET. We present an alternative process whereby deuterium is delivered to the location where the gate oxide reside by an implantation process. Deuterium ions were implanted using two different energies to account for the topography of the overlaying layers and placing the D peak at the top of gate oxide. A short anneal at forming gas was performed to remove the D-implantation damage. We have observed that deuterium ion implantation into the gate oxide region can successfully remove the interface states and the bulk defects. But the energy and the dose of the deuterium implant need to be optimized to maintain the Si substrates dopant activation, while generating deuterium bonds inside gate oxide. CV and IV characteristics studies also determined that the deuterium implant dose not degrade the transistor performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.59-63
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• 2015

This paper discusses the capacitance-voltage method in Metal-Oxide-Nitride-Oxide-Silicon (MONOS) devices to analyzed the characteristics of the top oxide/nitride, nitride/bottom oxide interface trap distribution. In the CV method, nitride trap density can be calculated based on the program characteristics of the nitride thickness variations. By applying this method, silicon rich nitride device found to have a larger trap density than stoichiometric nitride device. This result is consistent with previous studies. If this comparison analysis can be expected to result in improved reliability of the SONOS flash memory.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.5
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• pp.52-59
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• 1989

The reliability of the thin thermal oxide was investigated by using constant current stress method. Polysilicon gate MOS capacitors with oxide thickness range of 20-25nm were used in this experiment. Automatic measurement and statistical data analysis which were essential in reliability evaluation of VLSI process preformed by HP 9000 computer. Based on TDDB results, defect density, breakdown charge (Qbd) and lifetime of oxide film were evaluated. According to the polarity of the stress, some different characteristics were shown. Defect density was 62/$cm^2$ at negative gate injection. The value of Qbd was about 30C/$cm^2$ at positive gate injection, and about 21C/$cm^2$ at negative. The current density acceleration factor was 1.43$cm^2$/A for negative gate injection, and 1.25$cm^2$/A for positive gate injection.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.