• Title/Summary/Keyword: Oxide Semiconductor

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Characteristics of the Crystal Structure and Electrical Properties of Metal/Ferroelectric/Insulator/Semiconductor (Metal/Ferroelectric/Insulator/Semiconductor 구조의 결정 구조 및 전기적 특성에 관한 연구)

  • 신동석;최훈상;최인훈;이호녕;김용태
    • Journal of the Korean Vacuum Society
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    • v.7 no.3
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    • pp.195-200
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    • 1998
  • We have investigated the crystal structure and electrical properties of Pt/SBT/$CeO_2$/Si(MFIS) and Pt/SBT/Si(MFS) structures for the gate oxide of ferroelectric memory. XRD spectra and SEM showed that the SBT film of SBT/$CeO_2$/Si structure had larger grain than that of SBT/Si structure. Furthermore HRTEM showed that SBT/$CeO_2$/Si had 5 nm thick $SiO_2$layer and very smooth interface but SBT/Si had 6nm thick $SiO_2$layer and 7nm thick amorphous intermediate interface. Therefore, $CeO_2$film between SBT film and Si substrate is confirmed as a good candidate for a diffusion barrier. The remanent polarization decreased and coercive voltage increased in Pt/SBT/$CeO_2/Pt/SiO_2$/Si structure. This effect may increase memory window of MFIS structure directly related to the coercive voltage. From the capacitance-voltage characteristics, the memory of Pt/SBT(140 nm)/$CeO_2$(25 nm)/Si structure were in the range of 1~2 V at the applied voltage of 4~6 V. The memory window increased with the thickness of SBT film. These results may be due to voltage applied at SBT films. The leakage currents of Pt/SBT/$CeO_2$/Si and Pt/SBT/Si were $ 10^8A/\textrm{cm}^2$ and $ 10^6 A/\textrm{cm}^2$, respectively.

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Dependence of the Diode Characteristics of ZnO/b-ZnO/p-Si(111) on the Buffer Layer Thickness and Annealing Temperature (버퍼막 두께 및 버퍼막 열처리 온도에 따른 ZnO/b-ZnO/p-Si(111)의 전기적 특성 변화 및 이종접합 다이오드 특성 평가)

  • Heo, Joo-Hoe;Ryu, Hyuk-Hyun
    • Journal of the Korean Vacuum Society
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    • v.20 no.1
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    • pp.50-56
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    • 2011
  • In this study, the effects of ZnO buffer layer thickness and annealing temperature on the heterojunction diode, ZnO/b-ZnO/p-Si(111), were reported. The effects of those on the structural and electrical properties of zinc oxide (ZnO) films on ZnO buffered p-Si (111) substrate were also studied. Structural properties of ZnO thin films were studied by X-ray diffraction and I-V characteristics were measured by a semiconductor parameter analyzer. ZnO thin films with 70 nm thick buffer layer and annealing temperature of $700^{\circ}C$ showed the best c-axis preferred orientation. The best electrical property was found at the condition of buffer layer annealing temperature of $700^{\circ}C$ and 50nm thick ZnO buffer layer (resistivity: $2.58{\times}10^{-4}[{\Omega}-cm]$, carrier concentration: $1.16{\times}1020[cm^{-3}]$). The I-V characteristics for ZnO/b-ZnO/p-Si(111) heterojunction diode were improved with increasing buffer layer thickness at buffer layer annealing temperature of $700^{\circ}C$.

Thermoelectric Properties of ZnkIn2O3+k(k=1∼9) Homologous Oxides (Homologous 산화물 ZnkIn2O3+k(k=1∼9)의 열전 특성)

  • Nam, Yun-Sun;Choi, Joung-Kyu;Hong, Jeong-Oh;Lee, Young-Ho;Lee, Myung-Hyun;Seo, Won-Seon
    • Korean Journal of Materials Research
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    • v.13 no.8
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    • pp.543-549
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    • 2003
  • In order to investigate the thermoelectric properties of $Zn_{k}$ $In_2$$O_{ 3+k}$ homologous compounds, the samples of $Zn_{k}$ /$In_2$$O_{3+k}$ / (k = integer between 1 and 9) were prepared by calcining the mixed powders of ZnO and $In_2$$O_3$fellowed by sintering at 1823 K for 2 hours in air, and their electrical conductivities and Seebeck coefficients were measured as a function of temperature in the range of 500 K to 1150 K. X-ray diffraction analysis of the sintered samples clarified that single-phase specimens were obtained for $Zn_{k} /$In_2$$O_{3+k}$ with k = 3, 4, 5, 7, 8, 9. Electrical conductivity of the $Zn_{k}$ $In_2$$O_{3+k}$ / decreased with increasing temperature, and decreased with increasing k for k $\geq$ 3. The Seebeck coefficient was negative at all the temperatures for all compositions, confirming that $Zn_{k}$ $In_2$$O_{3+k}$ / is an n-type semiconductor. Absolute values of the Seebeck coefficient increased linearly with increasing temperature and increased with increasing k for k $\geq$ 3. The temperature dependence of the Seebeck coefficient indicated that Z $n_{k}$I $n_2$ $O_{3+k}$ could be treated as an extrinsic degenerate semiconductor. Figure-of-merits of Z $n_{k}$I $n_2$ $O_{3+k}$ were evaluated from the measured electrical conductivity and Seebeck coefficient, and the reported thermal conductivity. Z $n_{7}$ I $n_2$ $O_{10}$ has the largest figure-of-merit over all the temperatures, and its highest value was $1.5{\times}$10$^{-4}$ $K^{-1}$ at 1145 K.5 K.

Effects of RF power on the Electrical and Optical Properties of GZO Thin Films Deposited on Flexible Substrate (RF 파워가 플렉시블 기판에 성장시킨 GZO 박막의 전기적 및 광학적 특성에 미치는 영향)

  • Joung, Yang-Hee;Kang, Seong-Jun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2497-2502
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    • 2014
  • The 5 wt.% Ga-doped zinc oxide (GZO) thin films were fabricated on PES substrates with various RF power 50~80 W by using RF magnetron sputtering in order to investigate the optical and electrical properties of GZO thin films. The XRD measurement showed that GZO thin films exhibit c-axis orientation. At a RF power of 70W, the GZO thin film showed the highest (002) diffraction peak with a Full-Width-Half-Maximum (FWHM) of $0.44^{\circ}$. AFM analysis showed that the lowest surface roughness (0.20 nm) was obtained for the GZO thin film fabricated at 70 W of RF power. The electrical property indicated that the minimum resistivity ($6.93{\times}10^{-4}{\Omega}{\cdot}cm$) and maximum carrier concentration ($7.04{\times}10^{20}cm^{-3}$) and hall mobility ($12.70cm^2/Vs$) were obtained in the GZO thin film fabricated at 70W of RF power. The optical transmittance in the visible region was higher than 80 %, regardless of RF power. The optical band-gap showed the slight blue-shift with increased in carrier concentration which can be explained by the Burstein-Moss effect.

Formation of Thin $CoSi_2$by Layer Inversion of Co/Nb bi-layer (Co/Nb 이중층 구조의 막역전을 이용한 박막 $CoSi_2$의 형성)

  • Lee, Jong-Mu;Gwon, Yeong-Jae;Lee, Byeong-Uk;Kim, Yeong-Uk;Lee, Su-Cheon
    • Korean Journal of Materials Research
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    • v.6 no.8
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    • pp.779-785
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    • 1996
  • Thin $700^{\circ}C$films were formed through layer inversion of Co/Nb bilayer during rapid thermal annealing(RTA). The Nb interlayer seems to effectively prevent over-consumption of Si and to control the silicidation reaction by forming Co-Nb intermetallic compounds and removing the native oxide formed on Si substrate which interferes the uniform Co-Si interaction. The final layer structure of the Co/Nb bilayer after $700^{\circ}C$ RTA was found to be ${Nb}_{2}{O}_{3}$/${Co}_{2}$Si.CoSi/${NbCo}_{x}$/Nb(O, C)/${CoSi}_{2}$/ Si. The layer inversion and the formation of a stable CoSi, phase occurred above $700^{\circ}C$, and the Nb silicides were not found at any annealing temperature. These may be due to the formation of very stable Co-Nb intermetallic compounds and Nb oxides which limit the moving of Co and Si.

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Low Resistance Indium-based Ohmic Contacts to N-face n-GaN for GaN-based Vertical Light Emitting Diodes (GaN계 수직형 발광 다이오드를 위한 N-face n-GaN의 인듐계 저저항 오믹접촉 연구)

  • Kang, Ki Man;Park, Min Joo;Kwak, Joon Seop;Kim, Hyun Soo;Kwon, Kwang Woo;Kim, Young Ho
    • Korean Journal of Metals and Materials
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    • v.48 no.5
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    • pp.456-461
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    • 2010
  • We investigated the In-based ohmic contacts on Nitrogen-face (N-face) n-type GaN, as well as Ga-face n-type GaN, for InGaN-based vertical Light Emitting Diodes (LEDs). For this purpose, we fabricated Circular Transfer Length Method (CTLM) patterns on the N-face n-GaN that were prepared by using a laser-lift off method, as well as on the Ga-face n-GaN that were prepared by using a dry etching method. Then, In/transparent conducting oxide (TCO) and In/TiW schemes were deposited on the CTLM in order for low resistance ohmic contacts to form. The In/TCO scheme on the Ga-face n-GaN showed high specific contact resistance, while the minimum specific contact resistance was only 3${\times}$10$^{-2}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$, which can be attributed to the high sheet resistance of the TCO layer. In contrast, the In/TiW scheme on the Ga-face n-GaN produced low specific contact resistance of 2.1${\times}$10$^{5}$ $\Omega$-cm$^{2}$ after annealing at 500${^{\circ}C}$ for 1 min. In addition, the In/TiW scheme on the N-face n-GaN also resulted in a low specific contact resistance of 2.2${\times}$10$^{-4}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$. These results suggest that both the Ga-face n-GaN and N-face n-GaN.

Growth of Ga2O3 films on 4H-SiC substrates by metal organic chemical vapor deposition and their characteristics depend on crystal phase (유기 금속 화학 증착법(MOCVD)으로 4H-SiC 기판에 성장한 Ga2O3 박막과 결정 상에 따른 특성)

  • Kim, So Yoon;Lee, Jung Bok;Ahn, Hyung Soo;Kim, Kyung Hwa;Yang, Min
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.31 no.4
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    • pp.149-153
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    • 2021
  • ε-Ga2O3 thin films were grown on 4H-SiC substrates by metal organic chemical vapor deposition (MOCVD) and crystalline quality were evaluated depend on growth conditions. It was found that the best conditions of the ε-Ga2O3 were grown at a growth temperature of 665℃ and an oxygen flow rate of 200 sccm. Two-dimensional growth was completed after the merge of hexagonal nuclei, and the arrangement direction of hexagonal nuclei was closely related to the crystal direction of the substrate. However, it was confirmed that crystal structure of the ε-Ga2O3 had an orthorhombic rather than hexagonal. Crystal phase transformation was performed by thermal treatment. And a β-Ga2O3 thin film was grown directly on 4H-SiC for the comparison to the phase transformed β-Ga2O3 thin film. The phase transformed β-Ga2O3 film showed better crystal quality than directly grown one.

Characterization of various crystal planes of beta-phase gallium oxide single crystal grown by the EFG method using multi-slit structure (다중 슬릿 구조를 이용한 EFG 법으로 성장시킨 β-Ga2O3 단결정의 다양한 결정면에 따른 특성 분석)

  • Hui-Yeon Jang;Su-Min Choi;Mi-Seon Park;Gwang-Hee Jung;Jin-Ki Kang;Tae-Kyung Lee;Hyoung-Jae Kim;Won-Jae Lee
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.34 no.1
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    • pp.1-7
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    • 2024
  • β-Ga2O3 is a material with a wide band gap of ~4.8 eV and a high breakdown-voltage of 8 MV/cm, and is attracting much attention in the field of power device applications. In addition, compared to representative WBG semiconductor materials such as SiC, GaN and Diamond, it has the advantage of enabling single crystal growth with high growth rate and low manufacturing cost [1-4]. In this study, we succeeded in growing a 10 mm thick β-Ga2O3 single crystal doped with 0.3 mol% SnO2 through the EFG (Edge-defined Film-fed Growth) method using multi-slit structure. The growth direction and growth plane were set to [010]/(010), respectively, and the growth speed was about 12 mm/h. The grown β-Ga2O3 single crystal was cut into various crystal planes (010, 001, 100, ${\bar{2}}01$) and surface processed. The processed samples were compared for characteristics according to crystal plane through analysis such as XRD, UV/VIS/NIR/Spec., Mercury Probe, AFM and Etching. This research is expected to contribute to the development of power semiconductor technology in high-voltage and high-temperature applications, and selecting a substrate with better characteristics will play an important role in improving device performance and reliability.

Fabrications and Characterization of High Temperature, High Voltage Ni/6H-SiC and Ni/4H-SiC Schottky Barrier Diodes (고온, 고전압 Ni/4H-SiC 및 Ni/6H-SiC Schottky 다이오드의 제작 및 전기적 특성 연구)

  • Lee, Ho-Seung;Lee, Sang-Wuk;Shin, Dong-Hyuk;Park, Hyun-Chang;Jung, Woong
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.11
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    • pp.70-77
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    • 1998
  • Ni/SiC Schottky diodes have been fabricated using epitaxial 4H-SiC and 6H-SiC wafers. The epitaxial n-type layers were grown on $n^{+}$ substrates, with a doping density of 4.0$\times$10$^{16}$ c $m^{-3}$ and a thickness of 10${\mu}{\textrm}{m}$. Oxide-termination has been adopted in order to obtain high breakdown voltage and low leakage current. The fabricated Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes show excellent rectifying characteristics up to the measured temperature range of 55$0^{\circ}C$. In case of oxide-terminated Schottky barrier diodes, breakdown voltage of 973V(Ni/4H-SiC) and 920V(Ni/6H-SiC), and a very low leakage current of less than 1nA at -800V has been observed at room temperature. On non-terminated Schottky barrier diodes, breakdown voltages were 430V(Ni/4H-SiC) and 160v(Ni/6H-SiC). At room temperature, SBH(Schottky Barrier Height), ideality factor and specific on-resistance were 1.55eV, 1.3, 3.6$\times$10$^{-2}$ $\Omega$.$\textrm{cm}^2$ for Ni/4H-SiC Schottky barrier diodes, and 1.24eV, 1.2, 2.6$\times$10$^{-2}$$\Omega$.$\textrm{cm}^2$/ for Ni/SH-SiC Schottky barrier diodes, respectively. These results show that both Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes are very promising for high-temperature and high power applications.s..

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Performance Comparison of Vertical DMOSFETs in Ga2O3 and 4H-SiC (Ga2O3와 4H-SiC Vertical DMOSFET 성능 비교)

  • Chung, Eui Suk;Kim, Young Jae;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.22 no.1
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    • pp.180-184
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    • 2018
  • Gallium oxide ($Ga_2O_3$) and silicon carbide (SiC) are the material with the wide band gap ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV). These electronic properties allow high blocking voltage. In this work, we investigated the characteristic of $Ga_2O_3$ and 4H-SiC vertical depletion-mode metal-oxide-semiconductor field-effect transistors. We demonstrated that the blocking voltage and on-resistance of vertical DMOSFET is dependent with structure. The structure of $Ga_2O_3$ and 4H-SiC vertical DMOSFET was designed by using a 2-dimensional device simulation (ATLAS, Silvaco Inc.). As a result, 4H-SiC and $Ga_2O_3$ vertical DMOSFET have similar blocking voltage ($Ga_2O_3-1380V$, SiC-1420 V) and then when gate voltage is low, $Ga_2O_3-DMOSFET$ has lower on-resistance than 4H-SiC-DMOSFET, however, when gate voltage is high, 4H-SiC-DMOSFET has lower on-resistance than $Ga_2O_3-DMOSFET$. Therefore, we concluded that the material of power device should be considered by the gate voltage.